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1 datasheet digital dc/dc pmbus 17a module zl9117m the zl9117m is a 17a, variable output, step-down pmbus-compliant digital power supply. included in the module is a high-performance digital pwm controller, power mosfets, an inductor, and all the passive components required for a highly integrated dc/dc power solution. this power module has built-in auto-compensation algorithms, which eliminates the need for manual compensation design work. the zl9117m operates over a wide input voltage range and supports an output voltage range of 0.6v to 3.6v, which can be set by external resistors or via pmbu s. this high-efficiency power module is capable of delivering 17a. only bulk input and output capacitors are needed to finish the design. the output voltage can be precisely regulate d to as low as 0.6v with 1% output voltage regulation over line, load, and temperature variations. the zl9117m features auto-compensation, internal soft-start, auto-recovery overcurrent protection, an enable option, and prebiased output start-up capabilities. the zl9117m is packaged in a thermally enhanced, compact (15mmx15mm) and low profile (3.5mm) over-molded qfn package module suitable for automated assembly by standard surface mount equipment. the zl9117m is rohs compliant. figure 1 represents a typical implementation of the zl9117m. for pmbus operation, it is recommended to tie the enable pin (en) to sgnd. features ? complete digital switch mode power supply ? fast transient response ? auto compensating pid filter ? external synchronization ?output voltage tracking ?current sharing ? programmable soft-start delay and ramp ? overcurrent/undercurrent protection ? pmbus compliant applications ?server, telecom, and datacom ? industrial and medical equipment ? general purpose point of load related literature ? an2034 , ?configuring current sharing on the zl2004 and zl2006? figure 1. a complete digital switch mode power supply, only bulk input and output capacitors are required to finish the design v in cin i 2 c/smbus power good output v out rtn 4.5v to 13.2v enable ddc bus ext sync 10f 16v zl9117m sync sa scl sda vset vtrk fb+ vdrv vdd fb- pg ddc vr v25 sgnd en 4.7f 16v 4.7f 16v 10f 16v pgnd (epad) vin (epad) sw (epad) vout (epad) v drv 4.5v to 6.5v r sa r set cout december 16, 2014 fn7914.4 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas llc 2011-2014. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners.
zl9117m 2 fn7914.4 december 16, 2014 submit document feedback table of contents related literature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 pin configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 pin descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 zl9117m internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 typical application - single module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 thermal information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 typical performance curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 derating curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 i2c/smbus communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 output voltage selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 soft-start delay and ramp times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 power-good . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 switching frequency and pll . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 loop compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 adaptive diode emulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 input undervoltage lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 output overvoltage protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 output prebias protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 output overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 thermal overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 i2c/smbus module address selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 digital-dc bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 phase spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 output voltage tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 output sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 fault spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 active current sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 phase adding/dropping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 monitoring via i2c/smbus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 snapshot parameter capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 non-volatile memory and device security features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 layout guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 thermal consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 package description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 pcb layout pattern design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 thermal vias. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 stencil pattern design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 pmbus command summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 pmbus? data formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 firmware revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 about intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 package outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
zl9117m 3 fn7914.4 december 16, 2014 submit document feedback pin configuration zl9117m (21 ld qfn) top view sda vset vtrk fb+ fb- scl sa sync pg en ddc vr sgnd pgnd v25 vdd vdrv sw vin pgnd vout 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 pin descriptions pin label type description 1 sda i/o serial data. a pull-up resistor is required for this application. 2 scl i/o serial clock. a pull-up resistor is required for this application. 3 sa i serial address select pin. used to assi gn unique smbus address to each module. 4 sync i/o clock synchronization. used for sync hronization to external frequency reference. 5 pg o power-good output. 6 en i enable input (factory setting active high). pull-up to enable pwm switching and pull-down to disable pwm switching. 7 ddc i/o digital-dc bus (open drain). interoperability between inters il digital modules. a pull-up resistor is required for this application. 8 vr pwr internal 5v reference used to power internal drivers. connect 4.7 f bypass capacitor to this pin. 9 sgnd pwr signal ground. connect to low impedance ground plane. 10 pgnd pwr power ground. connect to low impedance ground plane. 11 v25 pwr internal 2.5v reference used to power internal circuitry. connect 4.7 f bypass capacitor to this pin. 12 vdd pwr input supply voltage for controller. connect 4.7 f bypass capacitor to this pin. 13 vdrv pwr power supply for internal fet drivers. connect 10 f bypass capacitor to this pin. 14 (epad) sw pwr drive train switch node. 15 (epad) vin pwr power supply input fet voltage. 16 (epad) pgnd pwr power ground. connect to low impedance ground plane. 17 (epad) vout pwr power supply output voltage. output voltage from pwm. 18 fb- i output voltage feedback. connect to load return of ground regulation point. 19 fb+ i output voltage feedback. connect to output regulation point. 20 vtrk i tracking sense input. used to track an external voltage source. 21 vset i output voltage selection pin. used to set v out set point and v out max.
zl9117m 4 fn7914.4 december 16, 2014 submit document feedback ordering information part number ( notes 1 , 2 , 3 ) part marking firmware revision ( note 4 ) temp range (c) package (rohs compliant) pkg. dwg. # zl9117mirz zl9117m fc04 -40 to +85 21 ld 15x15 qfn l21.15x15 ZL9117MAIRZ zl9117m fc05 -40 to +85 21 ld 15x15 qfn l21.15x15 notes: 1. add ?-t*? suffix for tape and reel. please refer to tb347 for details on reel specifications. 2. these intersil plastic packaged products are rohs compliant by eu exemption 7c-i and employ special pb-free material sets, mo lding compounds/die attach materials, and 100% matte tin plate plus anneal (e3) term ination finish which is compatible with both snpb and pb-free s oldering operations. intersil rohs compliant products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free require ments of ipc/jedec j std-020. 3. for moisture sensitivity level (msl), please see product information page for zl9117m . for more information on msl please see tech brief tb363 . 4. see ? firmware revision history ? on page 55 ; only the latest firmware revisi on is recommended for new designs. zl xxxxm f t r z s digital ? module ? designator base ? part ? number firmware ? revision blank: ? fc04 a: ? fc05 operating ? temperature i: ? industrial ? ( \ 40c ? to ? +85c) shipping ? option blank: ? bulk t: ? tape ? and ? reel rohs z: ? rohs ? compliant package ? designator r: ? quad ? flat ? no \ lead ? (qfn)
zl9117m 5 fn7914.4 december 16, 2014 submit document feedback zl9117m internal block diagram sw bst gl gh vdrv gnd vset vr vdd pwml scl ddc sa en pg v25 sync sgnd dgnd vtrk pwmh communication sda adc csa vsa supervisor temp sensor adc protection digital compensator oc/uc d-pwm pll sync out gate drive logic nlr power management ldo ldo ss mgn ov/uv current share interleave autocomp nvm vdrv vdd digital controller gate driver power stage fb+ fb- vout vdrv vin pgnd sgnd sw 0.22 h 22 22 fb
zl9117m 6 fn7914.4 december 16, 2014 submit document feedback typical applicatio n - single module zl9117m vin vdd vdrv scl sda ddc sync vtrk vout fb+ fb- vr v25 pgnd sgnd sa vset en r sa = 51.1k ? smbus add = 0x2a r set = 31.6k ? v out = 1.2v 10k ? 10k ? 4.75k ? 10f ceramic 10f ceramic 2x22f ceramic 330f bulk 4.7f ceramic 4x100f ceramic 2x330f poscap 4.7f ceramic r 4 = 200 ? r 1 r 2 r 3 c 1 c 2 c 3 c 4 c 5 c 6 c 7 c 8 v in 4.5 to 13.2v v dd 4.5 to 13.2v v drv 4.5 to 6.5v v logic 3.0 to 6.0v scl sda ddc sync vtrk en + + v out 1.2v 17a notes: 5. r 1 and r 2 are not required if the pmbus host already has i 2 c pull-up resistors. 6. only one r 3 per ddc bus is required when ddc bus is shared with other modules. 7. the vr, v25, vdrv, and vdd capacitors should be placed no farther than 0.5cm from the pin. 8. r 4 is optional but recommended to sink possib le ~100a backflow current from the fb+ pin. backflow current is present only when the module is in a disabled state with power still available at the vdd pin.
zl9117m 7 fn7914.4 december 16, 2014 submit document feedback absolute maximum ratings ( note 9 ) thermal information dc supply voltage for vdd pin . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 15.7v input voltage for vin pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 15.7v mosfet drive reference for vr pin . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v 2.5v logic reference for v25 pin. . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 3v mosfet driver power for vdrv pin . . . . . . . . . . . . . . . . . . . . . .-0.3v to 7.5v logic i/o voltage for ddc, en, fb+, fb-, pg, sa, scl, sda, sync, vset pins . . . . . . . . . . . . -0.3v to 6v esd rating human body model (tested per jesd22-a114f) . . . . . . . . . . . . . . 2000v machine model (tested per jesd22-a115c) . . . . . . . . . . . . . . . . . . 200v charged device model (tested per jesd22-c110d) . . . . . . . . . . . 1000v latch up (tested per jesd78c; class 2, level a) . . . . . . . . . . . . . . . 100ma thermal resistance (typical) ? ja (c/w) ? jc (c/w) qfn package ( notes 12 , 13 ) . . . . . . . . . . . 11.5 2.2 junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-55c to +150c storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-55c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see tb493 recommended operating conditions input supply voltage range, v in . . . . . . . . . . . . . . . . . . . . . . 4.5v to 13.2v input supply for controller, v dd ( note 10 ) . . . . . . . . . . . . . . . 4.5v to 13.2v driver supply voltage, v drv . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5v to 6.5v output voltage range, v out ( note 11 ) . . . . . . . . . . . . . . . . . . 0.54v to 3.6v output current range, i out(dc) ( note 24 ). . . . . . . . . . . . . . . . . . . 0a to 17a operating junction temperature range, t j . . . . . . . . . . . .-40c to +125c caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 9. voltage measured with respect to sgnd. 10. v in supplies the power fets. v dd supplies the controller. v in can be tied to v dd . for v dd 5.5v, v dd should be tied to vr. 11. includes 10% margin limits. 12. ? ja is simulated in free air with device mounted on a four-layer fr -4 test board (76.2 x 114.3 x 1.6mm) with 80% coverage, 2oz cu on top and bottom layers, plus two, buried, one-ounce cu layers with coverage acro ss the entire test board area. multiple vias were used, with vi a diameter = 0.3mm on 1.2mm pitch. 13. for ? jc , the ?case? temperature is measured at the center of the package underside. electrical specifications v dd = 12v, t a = -40c to +85c unless otherwise noted. typical values are at t a = +25c. boldface limits apply across the operating temperature range, -40c to +85c. parameter conditions min ( note 14 ) typ ( note 15 ) max ( note 14 )unit input and supply characteristics input bias supply current, i dd v in = vdd = 13.2v, f sw = 571khz, no load ? 20 40 ma input bias shutdown current, i dds en = 0v, no i 2 c/smbus activity ? 15.5 20 ma input supply current, i vin v in = 12v, i out = 17a, v out = 1.0v ?1.78? a driver supply current, i vdrv v drv = 6v, v out = 1.0v, f sw = 571hz, i out = 17a ? 30 ma vr reference output voltage ( note 16 )v dd > 6v, i vr < 20ma 4.5 5.2 5.7 v v25 reference output voltage ( note 16 )v r > 3v, i v25 < 20ma 2.25 2.5 2.75 v output characteristics output load current ( notes 23 , 24 )v in = 12v, v out = 1.0v ? ? 17 a output voltage accuracy ( notes 16 , 17 ) include line, load, temp ?1 +1 % peak-to-peak output ripple voltage, v out (note 17) i out = 17a, v out = 1.0v, c out = 3000f ? 6 ? mv soft-start delay duration range ( notes 16 , 18 )set using i 2 c/smbus 2 ? 200 ms soft-start delay duration accuracy ( note 16 ) turn-on delay (precise mode) ( notes 18 , 19 ) ? 0.25 ? ms turn-on delay (normal mode) ( note 20 ) ? -0.25/+4 ? ms turn-off delay ( note 20 ) ? -0.25/+4 ? ms soft-start ramp duration range ( note 16 )set using i 2 c 0 ? 200 ms soft-start ramp duration accuracy ( note 16 )?100?s dynamic characteristics voltage change for positive load step i out = 6a, slew rate = 2.5a/ s, v out = 1.0v, c out = 3000f ?3?% voltage change for negative load step i out = 6a, slew rate = 2.5a/ s, v out = 1.0v, c out = 3000f ?3?%
zl9117m 8 fn7914.4 december 16, 2014 submit document feedback oscillator and switching characteristics ( note 16 ) switching frequency range 400 571 1000 khz maximum pwm duty cycle factory setting 95 ??% minimum sync pulse width 150 ??ns input clock frequency drift tolerance external clock source -13 ? 13 % logic input/output characteristics (note 16) logic input bias current en, pg, scl, sda pins -10 ? 10 a logic input low, v il ? ? 0.8 v logic input high, v ih 2.0 ??v logic output low, v ol i ol 4ma ( note 22 ) ? ? 0.4 v logic output high, v oh i oh -2ma ( note 22 ) 2.25 ??v fault protection characteristics (note 16) uvlo threshold range configurable via i 2 c/smbus 2.85 ? 16 v uvlo set-point accuracy -150 ? 150 mv uvlo hysteresis factory setting ? 3 ? % configurable via i 2 c/smbus 0 ? 100 % uvlo delay ?? 2.5 s power-good v out threshold factory setting ?90?% v out power-good v out hysteresis factory setting ? 5 ? % power-good delay ( note 21 ) configurable via i 2 c/smbus 0 ? 200 ms vsen undervoltage threshold factory setting ? 85 ? % v out configurable via i 2 c/smbus 0 ? 110 % v out vsen overvoltage threshold factory setting ? 115 ? % v out configurable via i 2 c/smbus 0 ? 115 % v out vsen undervoltage hysteresis ?5?% v out vsen undervoltage/overvoltage fault response time factory setting ?16?s configurable via i 2 c/smbus 5 ? 60 s thermal protection threshold (controller junction temperature) factory setting ? 125 ? c configurable via i 2 c/smbus -40 ? 125 c thermal protection hysteresis ?15?c notes: 14. compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 15. parameters with typ limits are not production tested unless otherwise specified. 16. parameters are 100% tested for internal controller prior to module assembly. 17. v out measured at the termination of the fb+ and fb- sense points. 18. the device requires a delay period following an enable signal and prior to ramping its output. precise timing mode limits th is delay period to approximately 2ms, where in normal mode it may vary up to 4ms. 19. precise ramp timing mode is only valid when using the en pin to enable the device rather than pmbus enable. 20. the devices may require up to a 4ms delay following the assert ion of the enable signal (normal mode) or following the de-ass ertion of the enable signal. 21. factory setting for power-good delay is set to the same value as the soft-start ramp time. 22. nominal capacitance of logic pins is 5pf. 23. this condition is tested on the inte rsil 3-module evaluation board at +50c ambient temperature and 400lfm air flow. 24. the load current is related to the thermal derating curves. the maximum allowed current is derated while the output voltage goes higher than 2.5v. electrical specifications v dd = 12v, t a = -40c to +85c unless otherwise noted. typical values are at t a = +25c. boldface limits apply across the operating temperature range, -40c to +85c. (continued) parameter conditions min ( note 14 ) typ ( note 15 ) max ( note 14 )unit
zl9117m 9 fn7914.4 december 16, 2014 submit document feedback typical performance curves operating condition: t a = +25c, no air flow, f sw = 571khz. v drv = 5v. c out = 3000f. typical values are used unless otherwise noted. figure 2. efficiency, v in = 5v, for various output voltages figure 3. efficiency, v in = 9v, for various output voltages figure 4. efficiency, v in = 12v, for various output voltages figure 5. dynamic response, unload figure 6. dynamic response, load figure 7. soft-start ramp-up 70 75 80 85 90 95 100 0 2 4 6 8 1012141618 output current (a) efficiency (%) v out = 3.3v, f sw = 615khz v out = 2.5v, f sw = 727khz v out = 1.8v, v out = 1.2v, v out = 1v, f sw = 571khz f sw = 571khz f sw = 571hz 70 75 80 85 90 95 100 024681012141618 v out = 3.3v, f sw = 800khz v out = 2.5v, f sw = 727khz v out = 1.8v, v out = 1.2v, f sw = 571khz v out = 1v, f sw = 571kh f sw = 571khz output current (a) efficiency (%) 70 75 80 85 90 95 100 024681012141618 v out = 3.3v, f sw = 800khz v out = 2.5v, f sw = 727khz v out = 1.8v, v out = 1.2v, f sw = 571khz v out = 1v, f sw = 571kh f sw = 571khz output current (a) efficiency (%) -5 0 5 10 15 20 25 30 35 0 0.10.20.30.40.50.60.70.80.91.0 voltage deviation (mv) v in = 12v v out = 1.2v i out step = 12a to 6a slew 2.5a/s time (ms) -30 -25 -20 -15 -10 -5 0 5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 voltage deviation (mv) v in = 12v v out = 1.2v i out step = 6a to 12a slew 2.5a/s time (ms) -0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 012345678910 time (ms) v out (v) v out = 1.2v t rise = 5ms v in = 12v
zl9117m 10 fn7914.4 december 16, 2014 submit document feedback figure 8. ramp-down typical performance curves operating condition: t a = +25c, no air flow, f sw = 571khz. v drv = 5v. c out = 3000f. typical values are used unless otherwise noted. (continued) -0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 012345678910 time (ms) v out (v) v out = 1.2v t fall = 5ms v in = 12v derating curves operating conditions: t a = +25c, f sw = 571khz. v drv = 5v. c out = 3000f. typical values are used unless otherwise noted. figure 9. derating curve, 5v in , for various output voltages listed figure 10. derating curve, 12v in , for various output voltages listed figure 11. power loss curve, 5v in , for various output voltages listed figure 12. power loss curve, 12v in , for various output voltages listed 0 2 4 6 8 10 12 14 16 18 20 50 60 70 80 90 100 110 120 130 max. load current (a) ambient temperature (c) 1.0v 3.3v no air flow 0 2 4 6 8 10 12 14 16 18 20 50 60 70 80 90 100 110 120 130 max. load current (a) ambient temperature (c) 1.0v 1.8v 2.5v 3.3v no air flow 0 1 2 3 4 5 6 7 024681012141618 loss (w) output current (a) 1.0v 1.2v 2.5v 3.3v 1.8v 0 1 2 3 4 5 6 7 0 2 4 6 8 10 12 14 16 18 loss (w) output current (a) 1.0v 1.2v 1.8v 2.5v 3.3v
zl9117m 11 fn7914.4 december 16, 2014 submit document feedback functional description i 2 c/smbus communications the zl9117m provides an i 2 c/smbus digital interface that enables the user to configure all aspects of the module operation as well as monitor the input and output parameters. the zl9117m can be used with any i 2 c host device. in addition, the module is compatible with smbus version 2.0. pull-up resistors are required on the i 2 c/smbus as specified in the smbus 2.0 specification. the zl9117m accepts most standard pmbus commands. when controlling the device with pmbus commands, it is recommended that the enable pin is tied to sgnd. the smbus device address and vout_max are the only parameters that must be set by external pins. all other device parameters can be set via the i 2 c/smbus. the device address is set using the sa pin. vout_max is determined as 10% greater than the voltage set by the vset pin. standard 1% resistor values are used between the respective pin and sgnd. output voltage selection the output voltage may be set to a voltage between 0.6v and 3.6v provided that the input volt age is higher than the desired output voltage by an amount su fficient to prevent the device from exceeding its maximum duty cycle specification. the vset pin is used to set the output voltage to levels as shown in table 1. the r set resistor is placed between the vset pin and sgnd. the output voltage may also be set to any value between 0.6v and 3.6v using a pmbus command over the i 2 c/smbus interface. the rset resistor program places an upper limit in output voltage setting through pmbus programming to 10% above the value set by the resistor. soft-start delay and ramp times it may be necessary to set a delay from when an enable signal is received until the output voltage starts to ramp to its target value. in addition, the designer may wish to precisely set the time required for v out to ramp to its target value after the delay period has expired. these features may be used as part of an overall in-rush current management strategy or to precisely control how fast a load ic is turned on. the zl9117m gives the system designer several options for precisely and independently controlling both the dela y and ramp time periods. the soft-start delay period begins when the en pin is asserted and ends when the delay time expires. the soft-start delay and ramp times are set to custom values via the i 2 c/smbus interface. when the delay time is set to 0ms, the device begins its ramp-up after the internal circuitry has initialized (approximately 2ms). when the soft-start ramp period is set to 0ms, the output ramps up as quickly as the output load capacitance and loop settings allow. it is generally recommended to set the soft-start ramp to a value greater than 500s to prevent inadvertent fault conditions due to excessive in-rush current. power-good the zl9117m provides a power-good (pg) signal that indicates the output voltage is within a sp ecified tolerance of its target level and no fault condition exists . by default, the pg pin asserts if the output is within 10% of th e target voltage. these limits and the polarity of the pin may be changed via the i 2 c/smbus interface. a pg delay period is defined as the time from when all conditions within the zl9117m for asserting pg are met to when the pg pin is actually asserted. this feature is commonly used instead of table 1. output voltage resistor settings v out (v) r set (k ) 0.60 10 0.65 11 0.70 12.1 0.75 13.3 0.80 14.7 0.85 16.2 0.90 17.8 0.95 19.6 1.00 21.5 1.05 23.7 1.10 26.1 1.15 28.7 1.20 31.6 1.25 34.8 1.30 38.3 1.40 42.2 1.50 46.4 1.60 51.1 1.70 56.2 1.80 61.9 1.90 68.1 2.00 75 2.10 82.5 2.20 90.9 2.30 100 2.50 110 2.80 121 3.00 133 3.30 147 table 1. output voltage resistor settings (continued) v out (v) r set (k )
zl9117m 12 fn7914.4 december 16, 2014 submit document feedback using an external reset controller to control external digital logic. by default, the zl9117m pg delay is set equal to the soft-start ramp time setting. therefore, if th e soft-start ramp time is set to 10ms, the pg delay is set to 10ms. the pg delay may be set independently of the soft-start ramp using the i 2 c/smbus. switching frequency and pll the zl9117m incorporates an internal phase-locked loop (pll) to clock the internal circuitry. the pll can be driven by an external clock source connected to the sync pin. when using the internal oscillator, the sync pin can be configured as a clock source. if a clock signal is present, th e zl9117m?s oscillator will then synchronize the rising edge of the external clock. if no incoming clock signal is present, the zl911 7m will configure the switching frequency according to the state of the sync pin as listed in table 2 . the internal switching frequency of the zl9117m is 571khz. zl9117m will only read the sync pin connection during the start-up sequence. changes to the sync pin connections will not affect f sw until the power (vdd) is cycled off and on. if the user desires to configure other frequencies not listed in tables 2 or 3 , the switching frequency can also be set to any value between 400khz and 1mhz using the i 2 c/smbus interface. if a value other than f sw = 8mhz/n is entered using a pmbus command, the internal circuitry will select the switching frequency value using n as a whole number to achieve a value close to the entered value. for example, if 810kh is entered, the device will select 800khz (n = 10). when multiple intersil digital devices are used together, connecting the sync pins together will force all devices to synchronize with each other. one of the devices must be configured as a sync source an d the remaining devices must be configured as a sync input. the i 2 c/smbus must be used to configure the sync pin. note: the switching frequency read back using the appropriate pmbus command will differ slightly from the selected values in tables 2 and 3 . the difference is due to hardware quantization. loop compensation the zl9117m operates as a voltage-mode synchronous buck controller with a fixed frequency pwm scheme. the module is internally compensated via the i 2 c/smbus interface. the zl9117m has an auto compensation feature that measures the characteristics of the power train and calculates the proper tap coefficients. by default, auto compensation is configured to execute one time after ramp with 50% auto compensation gain with power-good asserted imme diately after the first auto compensation cycle completes. adaptive diode emulation adaptive diode emulation mode tu rns off the low-side fet gate drive at low load currents to prevent the inductor current from going negative, reducing the ener gy losses and increasing overall efficiency. diode emulation is available to single-phase devices only. note: the overall bandwidth of the device may be reduced when in diode emulation mode. disablin g the diode emulation prior to applying significant load steps is recommended. input undervoltage lockout the input undervoltage lockout (uvlo) prevents the zl9117m from operating when the input fa lls below a preset threshold, indicating the input supply is out of its specified range. the uvlo threshold (v uvlo ) can be set between 2.85v and 16v using the i 2 c/smbus interface. once an input undervoltage fault condition occurs, the device can respond in a number of ways, as follows: 1. continue operating without interruption. 2. continue operating for a given delay period, followed by shutdown if the fault still ex ists. the device remains in shutdown until instructed to restart. 3. initiate an immediate shutdown until the fault is cleared. the user can select a specific number of retry attempts. the default response from a uvlo fault is an immediate shutdown of the module. the cont roller continuously checks for the presence of the fault condition. if the fault condition is no longer present, the zl9117m is re-enabled. output overvoltage protection the zl9117m offers an internal output overvoltage protection circuit that can be used to prot ect sensitive load circuitry from being subjected to a voltage higher than its prescribed limits. a hardware comparator is used to compare the actual output voltage (seen at the fb+ pin) to a threshold set to 15% higher than the target output voltage (the default setting). if the fb+ table 2. switching frequency selection sync pin frequency low 400khz open 571khz high 1mhz resistor see table 3 table 3. r sync resistor values r sync (k ? )frequency (khz) 19.6, or connect to sgnd 400 21.5 421 23.7 471 26.1 533 28.7, or open 571 31.6 615 34.8 727 37.3 800 46.4 889 51.1, or connect to v25 or vr 1000
zl9117m 13 fn7914.4 december 16, 2014 submit document feedback voltage exceeds this threshold, the pg pin de-asserts, and the controller can then respond in a number of ways, as follows: 1. initiate an immediate shutdown until the fault is cleared. the user can select a specific number of retry attempts. 2. turn off the high-side mosfet and turn on the low-side mosfet. the low-side mosfet remains on until the device attempts a restart. the default response from an over voltage fault is to immediately shut down. the controller continuously checks for the presence of the fault condition, and when the fault condition no longer exists, the device is re-enabled. for continuous overvoltage protection when operating from an external clock, the only allo wed response is an immediate shutdown. output prebias protection an output prebias condition exis ts when an externally applied voltage is present on a power supply?s output before the power supply?s control ic is enabled. certain applications require that the converter not be allowed to si nk current during start-up if a prebias condition exists at the output. the zl9117m provides prebias protection by sampling the output voltage prior to initiating an output ramp. if a prebias voltage lower than the target voltage exists after the pre-configured delay period has expired, the target voltage is set to match the existing prebias voltage, and both drivers are enabled. the output voltage is then ramped to the final regulation value at the preconfigured ramp rate. the actual time the output takes to ramp from the prebias voltage to the target voltage varies, depending on the prebias voltage, however, the total time elapsed from when the delay period expires and when the output reaches its target value will match the pre-configur ed ramp time (see figure 13 ). if a prebias voltage higher than th e target voltage exists after the pre-configured delay period has expired, the target voltage is set to match the existing prebias voltage, and both drivers are enabled with a pwm duty cycle that would ideally create the pre-bias voltage. once the pre-configured soft-start ramp period has expired, the pg pin is asserted (assuming the prebias voltage is not higher than the overvoltage limit). the pwm then adjusts its duty cycle to match the original target voltage, and the output ramps down to the preconfigured output voltage. if a prebias voltage higher than the overvoltage limit exists, the device does not initiate a turn-on sequence and declares an overvoltage fault condition to exist. in this case, the device responds based on the output ov ervoltage fault response method that has been selected. see ? output overvoltage protection ? on page 12 for response options due to an overvoltage condition. note that prebias protection is not offered for current sharing groups that also have tracking enabled. v dd must be tied to v in for proper prebias start-up in single module operation. output overcurrent protection the zl9117m can protect the power supply from damage if the output is shorted to ground or if an overload condition is imposed on the output. the following ov ercurrent protection response options are available: 1. initiate a shutdown and attempt to restart an infinite number of times with a preset delay period between attempts. 2. initiate a shutdown and attempt to restart a preset number of times with a preset delay period between attempts. figure 13. output responses to prebias voltages
zl9117m 14 fn7914.4 december 16, 2014 submit document feedback 3. continue operating for a given delay period, followed by shutdown if the fault still exists. 4. continue operating through th e fault (this could result in permanent damage to the power supply). 5. initiate an immediate shutdown. the default response from an ov ercurrent fault is an immediate shutdown of the controller. the controller continuously checks for the presence of the fault condition, and if the fault condition no longer exists, the device is re-enabled. thermal overload protection the zl9117m includes a thermal sensor that continuously measures the internal temperat ure of the module and shuts down the controller when the temperature exceeds the preset limit. the default temperature limit is set to +125c in the factory, but the user may set the limit to a different value if desired. note that setting a higher thermal limit via the i 2 c/smbus interface may result in permanent damage to the controller. once the module has been disabled due to an internal temperature fault, the user may select one of several fault response options as follows: 1. initiate a shutdown and attempt to restart an infinite number of times with a preset delay period between attempts. 2. initiate a shutdown and attempt to restart a preset number of times with a preset delay period between attempts. 3. continue operating for a given delay period, followed by shutdown if the fault still exists. 4. continue operating through th e fault (this could result in permanent damage to the power supply). 5. initiate an immediate shutdown. if the user has configured the module to restart, the controller waits the preset delay period (if configured to do so) and then checks the module temperature. if the temperature has dropped below a threshold that is approximately +15c lower than the selected temperature fault limit, the controller attempts to re-start. if the temperature stil l exceeds the fault limit, the controller waits the preset delay period and retries again. the default response from a temp erature fault is an immediate shutdown of the module. the cont roller continuously checks for the fault condition, and once th e fault has cleared, the zl9117m is re-enabled. i 2 c/smbus module address selection each module must have its own unique serial address to distinguish between other devices on the bus. the module address is set by connecting a re sistor between the sa pin and sgnd. table 4 lists the available module addresses. digital-dc bus the digital-dc communications (ddc) bus is used to communicate between intersil digital modules and devices. this dedicated bus provides the communication channel between devices for features such as sequencing, fault spreading, and current sharing. the ddc pin on all digital-dc devices in an application should be connected together. a pull-up resistor is required on the ddc bus in order to guarantee the rise time as shown in equation 1 : where r pu is the ddc bus pull-up resistance and c load is the bus loading. the pull-up resistor may be tied to an external 3.3v or 5v supply as long as this voltage is present prior to or during device power-up. as rules of thumb, each device connected to the ddc bus presents approximately 10pf of capacitive loading, and each inch of fr4 pcb trace intr oduces approximately 2pf. the ideal design uses a central pull-u p resistor that is well-matched to the total load capacitance. the minimum pull-up resistance should be limited to a value that enables any device to assert the bus to a voltage that ensures a logic 0 (typically 0.8v at the device monitoring point), given the pull-up voltage and the pull-down current capability of the zl9117m (nominally 4ma). table 4. smbus address resistor selection r sa (k )smbus address 10 0x19 11 0x1a 12.1 0x1b 13.3 0x1c 14.7 0x1d 16.2 0x1e 17.8 0x1f 19.6 0x20 21.5 0x21 23.7 0x22 26.1, or connect to sgnd 0x23 28.7, or open 0x24 31.6, or connect to v25 or vr 0x25 34.8 0x26 38.3 0x27 42.2 0x28 46.4 0x29 51.1 0x2a 56.2 0x2b 61.9 0x2c 68.1 0x2d 75 0x2e 82.5 0x2f 90.9 0x30 100 0x31 table 4. smbus address resi stor selection (continued) r sa (k )smbus address rise time r pu ? c load 1 ? s ? = (eq. 1)
zl9117m 15 fn7914.4 december 16, 2014 submit document feedback phase spreading when multiple point-of-load converters share a common dc input supply, it is desirable to adjust the clock phase offset of each device such that not all devices start to switch simultaneously. setting each converter to start its switching cycle at a different point in time, can dramatically reduce input capacitance requirements and efficiency losses. since the peak current drawn from the input supply is effectively spread out over a period of time, the peak current drawn at any given moment is reduced, and the power losses proportional to the i rms 2 are reduced dramatically. to enable phase spreading, all converters must be synchronized to the same switching clock. the phase offset of each device may also be set to any value between 0 and 360 in 22.5 increments via the i 2 c/smbus interface. output voltage tracking high performance systems place stringent demands on the order in which the power supply voltages turn on. this is particularly true when powering fpgas, asic s, and other advanced processor devices that require multiple supply voltages to power a single die. in most cases, the i/o interf ace operates at a higher voltage than the core and therefore th e core supply voltage must not exceed the i/o supply voltage according to the manufacturers' specifications. voltage tracking protects these sensitive ics by limiting the differential voltage among multiple power supplies during the power-up and power-down sequence. the zl9117m integrates a lossless tracking scheme that allows its output to track a voltage that is applied to the vtrk pin with no additional components requir ed. the vtrk pin is an analog input that, when tracking mode is enabled, and configures the voltage applied to the vtrk pin to act as a reference for the member device's ou tput regulation. voltage tracking can be configured by pmbus only. an example is shown in figure 14 . the zl9117m offers two modes of tracking: coincident and ratiometric. figures 15 and 16 illustrate the output voltage waveform for the two tracking modes. coincident : this mode configures the zl9117m to ramp its output voltage at the same rate as the voltage applied to the vtrk pin. two options are available for this mode: a. track at 100% vout limited. member rail tracks the reference rail and stops when the member reaches its target voltage, figure 15 (a). b. track at 100% vtrk limited. member rail tracks the reference at the instantaneous voltage value applied to the vtrk pin, figure 15 (b). ratiometric: this mode configures the zl9117m to ramp its output voltage as a percentage of the voltage applied to the vtrk pin. the default setting is 50%, but an external resistor or pmbus command may be used to configure a different tracking ratio. a. track at 50% vout limited. member rail tracks the reference rail and stops when the member reaches 50% of the target voltage, figure 16 (a). b. track at 50% vtrk limited. member rail tracks the reference at the instantaneous voltage value applied to the vtrk pin until the me mber rail reaches 50% of the reference rail voltage, or if the member is configured to less than 50% of the reference the member will achieve its configured target, figure 16 (b). output sequencing a group of digital-dc modules or devices may be configured to power-up in a predetermined sequence. this feature is especially useful when powering advanced processors, fpgas and asics that require one supply to reach its operating voltage; prior to another supply reaching its operating voltage in order to avoid latch-up. multi-device sequencing can be achieved by configuring each device through the i 2 c/smbus interface. multiple device sequencing is configured by issuing pmbus commands to assign the preced ing device in the sequencing chain as well as the device that follows in the sequencing chain. scl sda vout zl9117m scl sda vout zl9117m vtrk sda scl vref vmem figure 14. pmbus trac king configuration ? track @ 1 00% vout limited vref > vmem en 0 0 en ~ ~ ~ ~ to ff d ly to n dly vm e m vr e f track @ 100% vtrk limited vref = vmem ~ ~ toff dly ton d ly vref vmem coi nc id ent tracki ng vref =1.8v vmem=0.9v vref =1.8v vmem=1.8v a. b. figure 15. coincident tracking figure 16. ratiometric tracking ? 0 en en 0 tra ck @ 50% vou t l imite d vre f = 1.8v vme m = 0.9 v ~ ~ ~ ~ toff dly to n dly vme m vref track @ 50% vtrk limited vref = 1.8v vmem = 0.8v ratiometric tracking vref=1.8v vmem=0.9v ~ ~ ~ ~ to n dly toff dly vref vm e m vref=1.8v vmem=0.8v a. b.
zl9117m 16 fn7914.4 december 16, 2014 submit document feedback the enable pins of all devices in a sequencing group must be tied together and driven high to initiate a sequenced turn-on of the group. enable must be driven lo w to initiate a sequenced turnoff of the group. fault spreading digital dc modules and devices ca n be configured to broadcast a fault event over the ddc bus to the other devices in the group. when a non-destructive fault occurs and the device is configured to shut down on a fault, the device shuts down and broadcasts the fault event over the ddc bus. the other devices on the ddc bus shut down simultaneously and attempt to re-start in their prescribed order, if configured to do so. active current sharing paralleling multiple zl9117m modules can be used to increase the output current capability of a single power rail. by connecting the ddc pins of each module together and configuring the modules as a current sharing rail, the units share the current equally within a few percent. figure 17 illustrates a typical connection for two modules. . the zl9117m uses a low-bandwidth, first-order digital current sharing technique to balance the unequal module output loading by aligning the load lines of member modules to a reference module. droop resistance is used to add ar tificial resistance in the output voltage path to control the slope of the load line curve, calibrating out the physical parasitic mismatches due to power train components and pcb layout. upon system start-up, the module with the lowest member position as selected in ishare_config is defined as the reference module. the remaining modules are members. the reference module broadcasts its current over the ddc bus. the members use the reference current information to trim their voltages (v member ) to balance the current loading of each module in the system. figure 18 shows that, for load lines with identical slopes, the member voltage is increased towards the reference voltage, which closes the gap between the inductor currents. the relation between reference and member current and voltage is given by equation 2 : where r is the value of the droop resistance. the ishare_config command is us ed to configure the module for active current sharing. the default setting is a stand-alone non-current sharing module. a curren t sharing rail can be part of a system sequencing group. for fault configuration, the curren t share rail is configured in a quasi-redundant mode. in this mode, when a member module fails, the remaining members continue to operate and attempt to maintain regulation. of the rema ining modules, the module with the lowest member position be comes the reference. if fault spreading is enabled, the current share rail failure is not broadcast until the entire current share rail fails. the phase offset of (multi-pha se) current sharing modules is automatically set to a value between 0 and 337.5 in 22.5 increments as in equation 3 : please refer to application note an2034 for additional details on current sharing. phase adding/dropping the zl9117m allows multiple power converters to be connected in parallel to supply higher load currents than can be addressed using a single-phase design. in doing so, the power converter is optimized at a load current range that requires all phases to be operational. during periods of ligh t loading, it may be beneficial to disable one or more phases to eliminate the current drain and switching losses associated with those phases, resulting in higher efficiency. the zl9117m offers the ability to add and drop phases using a pmbus command in response to an observed load current figure 17. current sharing group zl9117m v out zl9117m v in c out c in c out c in ddc ddc 3.3v to 5v -r -r v reference v member i member i reference i out v out figure 18. active current sharing (eq. 2) v member v out ri reference i member ? ?? ? + = phase offset smbus address 4:0 ?? current ? = (eq. 3) share position ? 22.5 ?
zl9117m 17 fn7914.4 december 16, 2014 submit document feedback change. all phases in a current sh are rail are considered active prior to the current sharing rail ramp to power-good. any member of the current sharing rail can be dropped. if the reference module is dropped, the remaining active module with the lowest member position becomes the new reference. additionally, any change to the number of members of a current sharing rail will precipitate autono mous phase distribution within the rail where all active phases realign their phase position based on their order within the number of active members. if the members of a current sharing rail are forced to shut down due to an observed fault, all members of the rail attempt to re-start simultaneously after the fault has cleared. monitoring via i 2 c/smbus a system controller can monitor a wide variety of different zl9117m system parameters through the i 2 c/smbus interface. the module can monitor for any number of power conversion parameters including but not limited to the following: ? input voltage/output voltage ? output current ? internal temperature ?switching frequency ? duty cycle snapshot parameter capture the zl9117m offers a special feature that enables the user to capture parametric data during normal operation or following a fault. the snapshot functionality is enabled by setting bit 1 of the misc_config command to 1. the snapshot feature enables the user to read parameters via a block read transfer through the smbus. this can be done during normal operation, although it should be noted that reading the 32 bytes occupies the smbus for a period of time. the snapshot_control command enables the user to store the snapshot parameters to flash memory in response to a pending fault, as well as to read the stored data from flash memory after a fault has occurred. in order to read the stored data from flash memory, two conditions must apply: 1. the module should be disabled. 2. snapshot mode should be disabled by changing bit 1 of misc_config to 0. this is to prevent firmware from updating ram values after the fault with current values. table 5 describes the usage of sn apshot_control command. automatic writes to flash memory following a fault are triggered when any fault threshold level is exceeded, provided that the specific fault's response is to shut down (writing to flash memory is not allowed if the device is configured to retry following the specific fault conditions). it should be noted that the device's vdd voltage must be maintained during the time when the device is writing the data to flash memory; a process that requ ires up to 1400s. undesirable results may be observed if the device's vdd supply drops below 3.0v during the process. the following is a recommended procedure for using the snapshot parameter capture after a fault: 1. configure the module using config file (optional) 2. enable the snapshot mode by setting bit 1 of misc_config command to 1. this can be done before or after the module is enabled. note: do not store misc_config: snapshot setting in defa ult/user store. 3. at this point the module starts capturing operational parameters in ram for snapshot, in every firmware cycle. 4. the module is configured to capture operational parameters after a fault during operation. 5. after the fault, disable the snap shot mode by setting bit 1 of misc_config command to 0. this is to prevent the firmware from updating ram values after the fault with current values. 6. disable the module. 7. send snapshot_control command 1 to read the stored data from flash memory into ram at any time. issue a snapshot command to read the data from ram via smbus. 8. repeat step 7 to retrieve snapshot parameters after a power cycle. it is important to make sure snapshot mode is disabled in the misc_config command. non-volatile memory and device security features the zl9117m has internal non-volatile memory where user configurations are stored. integr ated security measures ensure that the user can only restore the module to a level that has been made available to them. during the initialization process, the zl9117m checks for stored values contained in its internal non-volatile memory. the zl9117m offers two internal me mory storage units that are accessible by the user as follows: 1. default store: the zl9117m has a default configuration that is stored in the default store in th e controller. the module can be restored to its default settings by issuing a restore_default_all command over the smbus. 2. user store: the user can modify certain power supply settings as described in this data sheet. the user stores their configuration in the user store. table 5. snapshot_control command data value description 1 copies current snapshot values from flash memory to ram for immediate access using snapshot command. 2 writes current snapshot valu es to flash memory. only available when device is disabled.
zl9117m 18 fn7914.4 december 16, 2014 submit document feedback output capacitor selection several trade-offs must also be considered when selecting an output capacitor. low esr values are needed to have a small output deviation during transient load steps (v osag ) and low output voltage ripple (v orip ). however, capacitors with low esr, such as semi-stable (x5r and x7r) dielectric ceramic capacitors, also have relatively low capacitance values. many designs can use a combination of high capacitance devices and low esr devices in parallel. for high ripple currents, a low capacitance value can cause a significant amount of output voltage ripple. likewise, in high transient load steps, a relatively large amount of capacitance is needed to minimize the output voltage deviation while the inductor current ramps up or down to the new steady state output current value. as a starting point, apportion one-half of the output ripple voltage to the capacitor esr and the other half to capacitance, as shown in equations 4 and 5 : use these values to make an init ial capacitor selection, using a single capacitor or several capacitors in parallel. after a capacitor has been select ed, the resulting output voltage ripple can be calculated using equation 6 : because each part of this equation was made to be less than or equal to half of the allowed output ripple voltage, the v orip should be less than the desired maximum output ripple. usually, at higher output voltages , inductor ripple current is very high so it is recommend to use a combination of several ceramic capacitor with low esr bulk capacitors to ensure low output ripple voltage and lo op stability. inadequate amount of capacitance at the output can ca use instability to the control loop. input capacitor it is highly recommended that dedicated input capacitors be used in any point-of-load design, even when the supply is powered from a heavily filtered 5v or 12v ?bulk? supply from an off-line power supply. this is because of the high rms ripple current that is drawn by the buck converter topology. this ripple (i cinrms ) can be determined from equation 7 : without capacitive filtering near the power supply circuit, this current would flow through the supply bus and return planes, coupling noise into other system circuitry. the input capacitors should be rated at 1.2x the ripple current calculated in equation 7 to avoid overheating of the capacitors due to the high ripple current, which can cause premature failure. ceramic capacitors with x7r or x5r dielectric with low esr and 1.1x the maximum expected input voltage are recommended. layout guide to achieve stable operation, low losses, and good thermal performance some layout considerations are necessary. ? establish a separate ground plane for sgnd (pin 9) and pgnd (pin 10 and pin 16) and connect them at a single point as shown in the figure 19 . cv25, cvr, rsa, and rvset are placed on the bottom layer an d are connected to a single sgnd plane that is connected to the pgnd at a single point. this will help to block the high frequency noise from entering to the controller via sgnd. ? place a high frequency ceramic capacitor between (1) vin and pgnd (pin 16), (2) vout and pgnd (pin 16) and (3) bypass capacitors between vdrv, vdd, v25, vr and the ground plane, as close to the module as possible to minimize high frequency noise. high frequency ceramic capacitors close to the module between vout and pgnd will help to minimize noise at the output ripple. ? use large copper areas for power path (vin, pgnd, vout) to minimize conduction loss and thermal stress. also, use multiple vias to connect the power planes in different layers. ? connect remote sensed traces to the regulation point to achieve a tight output voltage regulation, and keep them in parallel. route a trace from fb- to a location near the load ground, and a trace from fb+ to the point-of-load where the tight output voltage is desired. ? avoid routing any sensitive signal traces, such as the vout, fb+, fb- sensing point near the phase pin. thermal consideration experimental power loss curves along with ja from thermal modeling analysis can be used to evaluate the thermal consideration for the module. the derating curves are derived from the maximum power allowed while maintaining the c out ? i lp-p ?? 8f sw v orip 2 ------------- - ? ? -------------------------------------- - = (eq. 4) (eq. 5) esr v orip 2i lp-p ?? ? --------------------------- = (eq. 6) v orip ? i lp-p ?? esr ? ? i lp-p ?? 8f sw c out ? ? ------------------------------------ - + = (eq. 7) i cinrms i out d1d ? ?? ? ? = figure 19. recommended layout sda vset vtrk scl sa sync pg en ddc vdrv vin pgnd vout 1 2 3 4 5 6 7 8 9 10 11 12 13 15 16 17 18 19 20 21 c vdrv c vdd to vout to load gnd s gnd vr pgnd v25 vdd c vr r sa r vset sw 14 fb+ fb- sgnd cin cout pgnd c v25
zl9117m 19 fn7914.4 december 16, 2014 submit document feedback temperature below the maximum junction temperature of +125c. in actual application, other heat sources and design margin should be considered. package description the structure of the zl9117m belongs to the quad flat-pack no-lead package (qfn). this ki nd of package has advantages, such as good thermal and electric al conductivity, low weight and small size. the qfn package is applicable for surface mounting technology and is being more readily used in the industry. the zl9117m contains several types of devices, including resistors, capacitors, inductors and control ics. the zl9117m is a copper lead-frame based package with exposed copper thermal pads, which have good electrical and thermal conductivity. the copper lead frame and multi component assembly is overmolded with polymer mold compound to protect these devices. the package outline and typical pcb layout pattern design and typical stencil pattern design are shown on the second page of the package outline drawing l21.15x15 on page 58 . the module has a small size of 15mmx15mmx3.5mm. figure 20 shows typical reflow profile parameters. these guidelines are general design rules. users could modify parameters according to their application. pcb layout pattern design the bottom of zl9117m is a lead-frame footprint, which is attached to the pcb by surface mounting process. the pcb layout pattern is shown on the second page of the package outline drawing l21.15x15 on page 58 . the pcb layout pattern is essentially 1:1 with the qfn exposed pad and i/o termination dimensions, except fo r the pcb lands being a slightly extended distance of 0.2mm (0.4mm max) longer than the qfn terminations, which allows for solder filleting around the periphery of the package. this ensures a more complete and inspectable solder joint. the thermal lands on the pcb layout should match 1:1 with the package exposed die pads. thermal vias a grid of 1.0mm to 1.2mm pitch thermal vias, which drops down and connects to buried copper plane(s), should be placed under the thermal land. the vias should be about 0.3mm to 0.33mm in diameter with the barrel plated to about 1.0 ounce copper. although adding more vias (by decreasing via pitch) will improve the thermal performance, diminishing returns will be seen as more and more vias are added. simply use as many vias as practical for the thermal land si ze and your board design rules allow. stencil pattern design reflowed solder joints on the perimeter i/o lands should have about a 50m to 75m (2mil to 3m il) standoff height. the solder paste stencil design is the first step in developing optimized, reliable solder joints. stencil aperture size to land size ratio should typically be 1:1. the aperture width may be reduced slightly to help prevent solder bridging between adjacent i/o lands. to reduce solder paste volume on th e larger thermal lands, it is recommended that an array of smaller apertures be used instead of one large aperture. it is reco mmended that the stencil printing area cover 50% to 80% of the pcb layout pattern. a typical solder stencil pattern is shown on the second page of the package outline drawing l21.15x15 on page 58 . the gap width between pad to pad is 0.6mm. the user should consider the symmetry of the whole stencil pattern when de signing its pads. a laser cut, stainless steel stencil with electropolished trapezoidal walls is recommended. electropolishing ?smooths? the aperture walls resulting in reduced surface friction and better paste release which reduces voids. using a trapezoida l section aperture (tsa) also promotes paste release and forms a "brick like" paste deposit that assists in firm component placem ent. a 0.1mm to 0.15mm stencil thickness is recommended for this large pitch (1.3mm) qfn. reflow parameters due to the low mount height of the qfn, "no clean" type 3 solder paste per ansi/j-std-005 is re commended. nitrogen purge is also recommended during reflow. a system board reflow profile depends on the thermal mass of the entire populated board, so it is not practical to define a specific soldering profile just for the qfn. the profile given in figure 20 is provided as a guideline, to be customized for varying manufacturing practices and applications. figure 20. typical reflow profile 0 300 100 150 200 250 350 0 50 100 150 200 250 300 temperature (c) duration (s) slow ramp (3c/s max) and soak from +150c to +200c for 60s~180s ramp rate ? 1.5c from +70c to +90c peak temperature ~+245c; typically 60s-150s above +217c keep less than 30s within 5c of peak temp.
zl9117m 20 fn7914.4 december 16, 2014 submit document feedback pmbus command summary command code command name description type data format default value default setting page 01h operation sets enab le, disable and vout margin modes. r/w byte bit page 24 02h on_off_config configures device to enable from en pin or opeartion command. r/w byte bit 16h pin enable soft off page 25 03h clear_faults clear fault indications send byte page 25 11h store_default_all stores all pmbus values written since last restore at default level. send byte page 25 12h restore_default_all restores pmbus settings that were stored at default level. send byte page 25 15h store_user_all stores all pmbus values written since last restore at user level. send byte page 25 16h restore_user_all restores pmbus settings that were stored in user level. send byte page 26 20h vout_mode preset to defined data format of vout commands. read byte bit 13h linear mode, exponent = -13 page 26 21h vout_command sets the nominal value of vout. r/w word l16u pin strap page 26 22h vout_trim sets trim value on vout. r/w word l16s 0000h 0v page 26 23h vout_cal_offset applies a fixed offset voltage to the vout_command. r/w word l16s 0000h 0v page 26 24h vout_max sets the maximum possible value of vout. r/w word l16u 1.1*vout pin strap page 26 25h vout_margin_high sets the value of the v out during a margin high. r/w word l16u 1.05*vout pin strap page 27 26h vout_margin_low sets the value of the v out during a margin low. r/w word l16u 0.95*vout pin strap page 27 27h vout_transition_rate sets the transition rate during margin or other change of v out . r/w word l11 ba00h 1v/ms page 27 28h vout_droop sets the lo adline (v/i slope) resistance for the rail. r/w word l11 0000h 0mv/a page 27 32h max_duty sets the maximum allowable duty cycle. r/w word l11 eadbh 91.375% page 27 33h frequency_switch sets the switchin g frequency. r/w word l11 pin strap page 28 37h interleave sets a phase offset between devices sharing a sync clock. r/w word bit set based on pmbus address page 28 38h iout_cal_gain sense resistance for inductor dcr current sensing. r/w word l11 ba2ah 1.083m page 28 39h iout_cal_offset sets the current-sense offset. r/w word l11 be00h -1a page 28 40h vout_ov_fault_limit sets the vout overvoltage fault threshold. r/w word l16u 1.15 * vout pin strap page 28 41h vout_ov_fault_response configures the vout overvoltage fault response. r/w byte bit 80h page 29 44h vout_uv_fault_limit sets the v out undervoltage fault threshold. r/w word l16u 0.85*vout pin strap page 29 45h vout_uv_fault_response configures the v out undervoltage fault response. r/w byte bit 80h disable and no retry page 29 46h iout_oc_fault_limit sets th e iout peak overcurrent fault threshold. r/w word l11 e250h 37a page 30 4bh iout_uc_fault_limit sets th e iout valley undercurrent fault threshold. r/w word l11 e5b0h -37a page 30 4fh ot_fault_limit sets the over-temperature fault threshold. r/w word l11 ebe8h 125c page 30
zl9117m 21 fn7914.4 december 16, 2014 submit document feedback 50h ot_fault_response configures the over-temperature fault response. r/w byte bit 80h disable and no retry page 30 51h ot_warn_limit sets the over-temperature warning limit. r/w word l11 eb70h +110c page 31 52h ut_warn_limit sets the under-temperature warning limit. r/w word l11 e4e0h -50c page 31 53h ut_fault_limit sets the under-temperature fault threshold. r/w word l11 e490h -55c page 31 54h ut_fault_response configures the under- temperature fault response. r/w byte bit 80h disable and no retry page 31 55h vin_ov_fault_limit sets the vin overvoltage fault threshold. r/w word l11 d3a0h 14.5v page 32 56h vin_ov_fault_response configures the vin overvoltage fault response. r/w byte bit 80h disable and no retry page 32 57h vin_ov_warn_limit sets the vin overvoltage warning limit. r/w word l11 d34dh 13.2v page 33 58h vin_uv_warn_limit sets the vin undervoltage fault threshold. r/w word l11 ca30h 4.38v page 33 59h vin_uv_fault_limit sets the vin undervoltage warning limit. r/w word l11 ca00h 4v page 33 5ah vin_uv_fault_response config ures the vin undervoltage fault response. r/w byte bit 80h disable and no retry page 33 5eh power_good_on sets the voltage threshold for power good indication. r/w word l16u 0.9*vout pin strap page 34 60h ton_delay sets the delay time from enable to start of vout rise. r/w word l11 ca80h 5ms page 34 61h ton_rise sets the rise time of vout after enable and ton_delay. r/w word l11 d280h 10ms page 34 64h toff_delay sets the delay time from disable to start of vout fall. r/w word l11 ca80h 5ms page 34 65h toff_fall sets the fall time of vout after disable and toff_delay. r/w word l11 d280h 10ms page 34 78h status_byte summary of most critic al faults read byte bit 00h no faults page 34 79h status_word summary of critical faults read word bit 0000h no faults page 35 7ah status_vout reports vout warnings/faults read byte bit 00h no faults page 35 7bh status_iout reports iout warnin gs/faults read byte bit 00h no faults page 36 7ch status_input reports input warnings/faults read byte bit 00h no faults page 36 7dh status_temperature reports temperature warnings/faults read byte bit 00h no faults page 36 7eh status_cml reports communication, memory, logic errors read byte bit 00h no faults page 37 80h status_mfr_specific reports voltage monitoring/clock sync faults read byte bit 00h no faults page 37 88h read_vin reports input voltage measurement read word l11 page 37 8bh read_vout reports input current measurement read word l16u page 37 8ch read_iout reports output current measurement read word l11 page 38 8dh read_temperature_1 repor ts temperature reading internal to the device read word l11 page 38 pmbus command summary (continued) command code command name description type data format default value default setting page
zl9117m 22 fn7914.4 december 16, 2014 submit document feedback 94h read_duty_cycle reports actual duty cycle read word l11 page 38 95h read_frequency reports actual switching frequency read word l11 page 38 98h pmbus_revision returns the revision of the pmbus. read byte hex page 38 99h mfr_id sets a user defined id entification. r/w block asc page 38 9ah mfr_model sets a user defined model. r/w block asc page 38 9bh mfr_revision sets a user defined revision. r/w block asc page 39 9ch mfr_location sets a user defined location identifier. r/w block asc page 39 9dh mfr_date sets a user defined data. r/w block asc page 39 9eh mfr_serial sets a user defined serialized identifier. r/w block asc page 39 b0h user_data_00 sets a user defined data. r/w block asc page 39 bch auto_comp_config configures the auto compensation features. r/w byte cus 69h autocomp enabled gain = 70% page 40 bdh auto_comp_control causes the auto comp algorithm to initiate. send byte bit page 40 bfh deadtime_max sets the maximum deadtime values. r/w word cus 3838h h-l = 56ns l-h = 56ns page 40 d0h mfr_config configures several manufacturer level features. r/w word bit 6a11h refer to description page 41 d1h user_config configures several user level features. r/w word bit 2011h refer to description page 41 d2h ishare_config configures the device for current sharing mode. r/w word bit 0000h current share disabled page 42 d3h ddc_config configures the ddc bus. r/w word bit set based on pmbus address page 42 d4h power_good_delay sets the delay pg threshold and asserting the pg pin. r/w word l11 ba00h 1ms page 43 d5h pid_taps configures the control loop compensator coefficients. r/w block cus calculated by autocomp page 43 d6h inductor sets the inductor value r/w word l11 b0e1h 0.22h page 44 d7h nlr_config configures the non-linear response (nlr) control. r/w word bit 00000000h refer description section page 44 d8h ovuv_config configures output voltage ov/uv fault detection r/w byte bit 00h fastest response no crowbar page 44 dch tempco_config sets tempco settings r/w byte cus 2ch 4400 ppm/c page 45 ddh deadtime sets default dead time settings r/w word cus 1018h h-l = 16ns l-h = 24ns page 45 deh deadtime_config configures the adaptive dead time optimization mode r/w word cus 8686h adaptive dead time disabled page 45 e0h sequence ddc rail sequencing configuration r/w word bit 0000h prequel and sequel disabled page 46 e1h track_config configures voltage tracking modes r/w byte bit 00h tracking disabled page 46 e2h ddc_group configures group id, fault spreading, operation and vout r/w block bit 00000000h ignore fault spread page 47 e4h device_id returns the device identifier string read block asc reads device version page 47 pmbus command summary (continued) command code command name description type data format default value default setting page
zl9117m 23 fn7914.4 december 16, 2014 submit document feedback e5h mfr_iout_oc_fault_response configures the iout overcurrent fault response. r/w byte bit 80h disable and no retry page 47 e6h mfr_iout_uc_fault_response configures the iout undercurrent fault response. r/w byte bit 80h disable and no retry page 48 e7h iout_avg_oc_fault_limit sets the iout average overcurrent fault threshold. r/w word l11 db20h 25a page 48 e8h iout_avg_uc_fault_limit sets the iout average undercurrent fault threshold. r/w word l11 dce0h -25a page 48 e9h misc_config sets options pertaining to advanced features. r/w word bit 0800h broadcast disabled page 49 eah snapshot 32-byte read-back of parametric and status values read block bit n/a page 49 ebh blank_params indicates recently saved parameter values read block bit ff...ffh page 50 f0h phase_control controls phase adding/dropping for current sharing configuration. r/w byte bit 00h all phases active page 50 f3h snapshot_control controls how snapshot values are handled. r/w byte bit page 50 f4h restore_factory restores device to the hard-coded default values send byte page 50 f5h mfr_vmon_ov_fault_limit sets the vdrv overvoltage fault threshold r/w word l11 cb80 7v page 50 f6h mfr_vmon_uv_fault_limit sets the vdrv undervoltage fault threshold r/w word l11 ca40h 4.5v page 51 f7h mfr_read_vmon reads the vdrv voltage read word l11 page 51 f8h vmon_ov_fault_response configures the vdrv overvoltage fault response r/w byte bit 80h disable and no retry page 51 f9h vmon_uv_fault_response configures the vdrv undervoltage fault response r/w byte bit 80h disable and no retry page 51 fah security_level reports the security level read byte hex 1 public security level page 52 fbh private_password sets the private password string r/w block asc 000...00h page 54 fch public_password sets the public password string r/w block asc 00...00h page 54 fdh unprotect identifies which commands are protected r/w block bit ff...ffh n/a page 54 pmbus command summary (continued) command code command name description type data format default value default setting page
zl9117m 24 fn7914.4 december 16, 2014 submit document feedback pmbus commands description operation (01h) definition : sets enable, disable and vout margin settings. if multiple zl 9117m modules are configured as a current sharing rail, and at the mean time are configured to start/shut down from enable pin (in the on_off_config), then the margining of the current sharin g rail should follow this procedure: the desired operation command should be sent to all the member modules first, then the same operation command is sent to the reference module at last. data length in bytes: 1 data format: bit type: r/w byte default value: units: n/a pmbus? data formats linear-11 (l11) l11 data format uses 5-bit two?s compliment exponent (n) and 11- bit two?s compliment mantissa (y) to represent real world decim al value (x). relation between real world decimal value (x), n and y is: x = y2 n linear-16 unsigned (l16u) l16u data format uses a fixed exponent (hard-coded to n = -13h) and a 16-bit unsigned integer ma ntissa (y) to represent real wo rld decimal value (x). relation between real world decimal value (x), n and y is: x = y2 -13 linear-16 signed (l16s) l16s data format uses a fixed exponent (hard-coded to n = -13h) and a 16-bit two?s compliment ma ntissa (y) to represent real wo rld decimal value (x). relation between real world decimal value (x), n and y is: x = y2 -13 bit field (bit) break down of bit field is provided in the following pmbus? command description section custom (cus) break down of custom data format is provided in the following pmbus? command description sectio n. a combination of bit field an d integer are common type of custom data format. ascii (asc) a variable length string of text characters uses ascii data format. data byte high data byte low exponen t ( n )mantissa ( y ) 76543210 76543210 settings actions 04h immediate off (no sequencing) 44h soft off (with sequencing) 84h on - nominal 94h on - margin low a4h on - margin high
zl9117m 25 fn7914.4 december 16, 2014 submit document feedback on_off_config (02h) definition: configures the interpretation and coordination of the operation command and the enable pin (en). data length in bytes: 1 data format: bit type: r/w byte default value: 16h (device starts/shutdown from enable pin with soft off) units: n/a clear_faults (03h) definition : clears all fault bits in all registers. if a fault condition still exists, the bit will reassert immediately. this command wi ll not restart a device if it has shut do wn, it will only clear the faults. data length in bytes: 0 data format: n/a type: send byte default value: n/a units: n/a store_default_all (11h) definition : stores all current pmbus? values from the operating memory into the non-volatile default store memory. to clear the default store, perform a restore_factory then store_default_all. to add to the default store, perform a restore_default_all, write commands to be added, then store_default_all. this co mmand should not be used during device operation, the device will be unresponsive for 20ms while storing values. data length in bytes: 0 data format: n/a type: send byte default value: n/a units: n/a restore_default_all (12h) definition: restores pmbus? settings from the non-volatile default store memory into the operating memory. these settings are loaded at power up if not superseded by settings in user store. security level is changed to level 1 following this command. th is command should not be used during device operation. data length in bytes: 0 data format: n/a type: send byte default value: n/a units: n/a store_user_all (15h) definition : stores all pmbus settings from the operating memory to the non-volatile user store memory. to clear the user store, perform a restore_factory then store_user_all. to add to the user store, perform a restore_user_all, write commands to be added, then store_user_all. this command can be used during device operation, but the device will be unresponsive for 20ms while storing values. data length in bytes: 0 data format: n/a type: send byte default value: n/a units: n/a settings actions 00h device starts any time power is present regardless of enable pin or operation command states. 16h device starts/shutdowns from enable pin with soft off option 17h device starts/shutdowns from en able pin with immediate off option 1ah device starts/shutdowns from operation command
zl9117m 26 fn7914.4 december 16, 2014 submit document feedback restore_user_all (16h) definition: restores all pmbus settings from the user store memory to the operating memory. command performed at power-up. security level is changed to level 1 following this comm and. this command can be us ed during device operation. data length in bytes: 0 data format: n/a type: send byte default value: n/a units: n/a vout_mode (20h) definition: reports the vout mode and provides the exponent used in ca lculating several vout settings. fixed with linear mode with default exponent (n) = -13. data length in bytes: 1 data format: bit type: read only default value: 13h (linear mode, n = -13) units: n/a vout_command (21h) definition: this command sets or reports the target output voltage. this command cannot set a value higher than either vout_max or 110% of the pin strap vout setting. data length in bytes: 2 data format: l16u type: r/w word default value: pin strap setting units: volts range: 0v to vout_max vout_trim (22h) definition: sets a trim value on vout data length in bytes: 2 data format: l16s type: r/w word default value: 0000h units: volts range: -4v to 4v vout_cal_offset (23h) definition: the vout_cal_offset command is used to apply a fixed offset voltage to the output voltage command value. this command is typically used by the user to ca librate a device in th e application circuit. data length in bytes: 2 data format: l16s type: r/w word default value: 0000h units: volts range: -4v to 4v vout_max (24h) definition: the vout_ max command sets an upper limit on the outp ut voltage the unit can command regardless of any other commands or combinations. the intent of this command is to prov ide a safeguard against a user a ccidentally setting the output voltage to a possibly destructive level rather th an to be the primary output overprotection. data length in bytes: 2 data format: l16u type: r/w word default value: 1.10 x vout_command pin strap setting units: volts range: 0v to 4v
zl9117m 27 fn7914.4 december 16, 2014 submit document feedback vout_margin_high (25h) definition: sets the value of the vout during a margin high. this vo ut_margin_high command loads the unit with the voltage to which the output is to be changed when the operation command is set to ?margin high?. data length in bytes: 2 data format: l16u type: r/w word default value: 1.05 x vout_command pin strap setting units: volts range: 0v to vout_max vout_margin_low (26h) definition: sets the value of the vout during a margin low. this vout _margin_low command loads the un it with the voltage to which the output is to be changed when the op eration command is set to ?margin low?. data length in bytes: 2 data format: l16u type: r/w word default value: 0.95 x vout_command pin strap setting units: volts range: 0v to vout_max vout_transition_rate (27h) definition: this command sets the rate at which the output should change voltage when the device receives an operation command (margin high, margin low) that causes the output voltage to ch ange. the maximum possible positive value of the two data bytes indicates that the device should make the transition as quickly as possible. data length in bytes: 2 data format: l11 type: r/w word default value: ba00h (1.0 v/ms) units: v/ms range: 0.1 to 4v/ms vout_droop (28h) definition: the vout_droop sets the effective load line (v/i slope) for the rail in which the device is used. it is the rate, in mv/a, at which the output voltage decreases (or increases) with increasing (or decreasing) output current for use with adaptive voltage positioning requirements and pa ssive current sharing schemes. data length in bytes: 2 data format: l11 type: r/w word default value: 0000h (0mv/a) units: mv/a range: 0 to 40 mv/a max_duty (32h) definition: sets the maximum allowable duty cycle data length in bytes: 2 data format: l11 type: r/w word default value: eabdh (91.375%) units: %
zl9117m 28 fn7914.4 december 16, 2014 submit document feedback frequency_switch (33h) definition: sets the switching frequency of the device. initial default value is defined by a pin strap and this value can be overridden by writing this command via pmbus. if an external sync is utilized, this value should be set as close as possible to the external clock value. the output must be disabled when writing this command. data length in bytes: 2 data format: l11 type: r/w word default value: pin strap setting units: khz range: 400khz to 1000khz interleave (37h) definition: configures the phase offset of a device that is sharing a comm on sync clock with other device s. a value of 0 for the number in group field is interpreted as 16, to allow for phase spreadin g groups of up to 16 devices. for current sharing rails, interl eave is used to set the initial phase of the rail. the current share devices th en automatically distribute their phase relative to the inter leave. setting. data length in bytes: 2 data format: bit type: r/w word default value: set based on pin-strap pmbus address units: n/a iout_cal_gain (38h) definition: sets the effective impedance across the current sense ci rcuit for use in calculating output current at +25c. data length in bytes: 2 data format: l11 type: r/w word default value: ba2ah (1.083m ) units: m iout_cal_offset (39h) definition: used to null out any offsets in the output current sensing circuit, and to compensate for delayed measurements of current ramp due to isense blanking time. data length in bytes: 2 data format: l11 type: r/w word default value: be00h (-1a) units: a vout_ov_fault_limit (40h) definition: sets the vout overvoltage fault threshold. data length in bytes: 2 data format: l16u type: r/w word default value: 1.15 x vout_command pin strap setting units: v range: 0v to vout_max bits purpose value description 15:2 reserved 0 reserved 11:8 group number 0 to 15 sets a number to a group of interleaved rails 7:4 number in group 0 to 15 sets the number of rail s in the group a value of 0 is interpreted as 16 3:0 position in group 0 to 15 sets position of the device's rail within the group
zl9117m 29 fn7914.4 december 16, 2014 submit document feedback vout_ov_fault_response (41h) definition: configures the vout overvoltage fault response. note that the device cannot be set to ignore this fault mode. the retry time is the time between restart attempts. data length in bytes: 1 data format: bit type: r/w byte default value: 80h (disable and no retry) units : n/a vout_uv_fault_limit (44h) definition: sets the vout undervoltage fault threshold. this fault is masked during ramp or when the device is disabled. data length in bytes: 2 data format: l16u type: r/w word default value: 0.85 x vout_command pin strap setting units: v range: 0v to vout_max vout_uv_fault_response (45h) definition: configures the vout unde rvoltage fault response. data length in bytes: 1 data format: bit type: r/w byte default value: 80h (disable, no retry) units: n/a bit field name value description 7:6 response behavior: sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 continuous operation (ignore fault) 01 delay, disable and retry delay time is specified by bits [2:0] and retry attempt is specified in bits [5:3]. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 the pmbus device attempts to restart the nu mber of times set by these bits. the time between the start is set by the value in bits [2:0]. 111 attempts to restart continuously, without checking if the fault is still present, until it is disabled, bias power is removed, or another fault condition causes the unit to shut down. 2:0 retry and delay time 000-111 this time count is used for both the amount of time between retry attempts and for the amount of time a rail is to delay its response after a fault is detected. the retry time and delay time units are defined by the type of fault within each device. bit field name value description 7:6 response behavior: sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 continuous operation (ignore fault) 01 delay, disable and retry delay time is specified by bits [2:0] and retry attempt is specified in bits [5:3]. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. output is enabled when the fault condition no longer exists.
zl9117m 30 fn7914.4 december 16, 2014 submit document feedback iout_oc_fault_limit (46h) definition: sets the inductor peak overcurrent fault threshold. this li mit is applied to current measurement samples taken after the current sense blanking time has expired. a fault occurs after this limit is exceeded for the number of consecutive samples as d efined in mfr_config. data length in bytes: 2 data format: l11 type: r/w word default value: e250h (37a) units: a range: -100 to 100a iout_uc_fault_limit (4bh) definition: sets the inductor valley undercurrent fa ult threshold. this limit is applied to current measurement samples taken after the current sense blanking time has expired. a fault occurs after this limit is exceeded for the number of consecutive samples as d efined in mfr_config. data length in bytes: 2 data format: l11 type: r/w word default value: e5b0h (-37a) units: a range: -100 to 100a ot_fault_limit (4fh) definition: sets the temperature at which the device should indicate an over-temperature fault. note that the temperature must drop below ot_warn_limit to clear this fault. data length in bytes: 2 data format: l11 type: r/w word default value: ebe8h (+125c) units: celsius range: 0 to +175c ot_fault_response (50h) definition: instructs the device on what action to take in response to an over-temperature fault. the delay time is the time between restart attempts. data length in bytes: 1 data format: bit type: r/w byte default value: 80h (disable and no retry) units: n/a 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 the pmbus device attempts to restart the number of times set by these bits. the time between the start is set by the value in bits [2:0]. 111 attempts to restart continuously, without checking if the fault is still present, until it is disabled, bias power is removed, or another fault condition causes the unit to shut down. 2:0 retry and delay time 000-111 this time count is used for both the amount of time between retry attempts and for the amount of time a rail is to delay its response after a fault is detected. the retry time and delay time units are defined by the type of fault within each device. bit field name value description
zl9117m 31 fn7914.4 december 16, 2014 submit document feedback ot_warn_limit (51h) definition: sets the temperature at which the device should indicate an over-temperature warning alarm. in response to the ot_warn_limit being exceeded, the device: sets the temper ature bit in status_word, sets the ot_warning bit in status_temperature, and notifies the host. data length in bytes: 2 data format: l11. type : r/w word default value: eb70h (+110c) units: celsius range: 0 to +175c ut_warn_limit (52h) definition: set the temperature at which the device should indicate an under-temperature warning alarm. in response to the ut_warn_limit being exceeded, the device sets the temper ature bit in status_word, sets the ut_warning bit in status_temperature, and notifies the host. data length in bytes: 2 data format: l11. type : r/w word default value: e4e0h (-50c) units: celsius range : -55 to +25c ut_fault_limit (53h) definition: sets the temperature at which the device should indicate an under-temperature fault. note that the temperature must rise above ut_warn_limit to clear this fault. data length in bytes: 2 data format: l11 type: r/w word default value: e490h (-55c) units: celsius range: -55 to +25c ut_fault_response (54h) definition: instructs the device on what action to take in response to an under-temperature fault. the delay time is the time between restart attempts. data length in bytes: 1 data format: bit type: r/w byte default value: 80h (disable, no retry) units: n/a bit field name value description 7:6 response behavior: sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 continuous operation (ignore fault) 01 delay, disable and retry delay time is specified by bits [2:0] and retry attempt is specified in bits [5:3]. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 the pmbus device attempts to restart the nu mber of times set by these bits. the time between the start is set by the value in bits [2:0]. 111 attempts to restart continuously, without checking if the fault is still present, until it is disabled, bias power is removed, or another fault condition causes the unit to shut down. 2:0 retry and delay time 000-111 this time count is used for both the amount of time between retry attempts and for the amount of time a rail is to delay its response after a fault is detected. the retry time and delay time units are defined by the type of fault within each device.
zl9117m 32 fn7914.4 december 16, 2014 submit document feedback vin_ov_fault_limit (55h) definition: sets the vin overvoltage fault threshold. data length in bytes: 2 data format: l11 type: r/w word default value: d3a0h (14.5v) units: v range: 0 to 16v vin_ov_fault_response (56h) definition: configures the vin overvoltage fault response. the delay time is the time between restart attempts. data length in bytes: 1 data format: bit type: r/w byte default value: 80h (disable and no retry) units: bit field name value description 7:6 response behavior: sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 continuous operation (ignore fault) 01 delay, disable and retry delay time is specified by bits [2:0] and retry attempt is specified in bits [5:3]. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 the pmbus device attempts to restart the nu mber of times set by these bits. the time between the start is set by the value in bits [2:0]. 111 attempts to restart continuously, without checking if the fault is still present, until it is disabled, bias power is removed, or another fault condition causes the unit to shut down. 2:0 retry and delay time 000-111 this time count is used for both the amount of time between retry attempts and for the amount of time a rail is to delay its response after a fault is detected. the retry time and delay time units are defined by the type of fault within each device. bit field name value description 7:6 response behavior: sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 continuous operation (ignore fault) 01 delay, disable and retry delay time is specified by bits [2:0] and retry attempt is specified in bits [5:3]. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 the pmbus device attempts to restart the nu mber of times set by these bits. the time between the start is set by the value in bits [2:0]. 111 attempts to restart continuously, without checking if the fault is still present, until it is disabled, bias power is removed, or another fault condition causes the unit to shut down. 2:0 retry and delay time 000-111 this time count is used for both the amount of time between retry attempts and for the amount of time a rail is to delay its response after a fault is detected. the retry time and delay time units are defined by the type of fault within each device.
zl9117m 33 fn7914.4 december 16, 2014 submit document feedback vin_ov_warn_limit (57h) definition: sets the vin overvoltage warning threshold. in response to the vin_ov_warn_limit being exceeded, the device sets the none of the above and input bits in status_word, sets the vin_ov_warning bit in status_input, and notifies the host. data length in bytes: 2 data format: l11. type : r/w word default value: d34dh (13.2v) units: v range : 0 to 19v vin_uv_warn_limit (58h) definition: sets the vin undervoltage warning threshold. if a vi n_uv_fault occurs, the input voltage must rise above vin_uv_warn_limit to clear the fault, which provides hysteresis to the fault threshold. in response to the uv_warn_limit being exceeded, the device sets the none of the above and input bits in status_word, sets the vin_uv_warning bit in status_input, and notifies the host. data length in bytes: 2 data format: l11. type : r/w word default value: ca30h (4.38v) units: v range : 0 to 19v vin_uv_fault_limit (59h) definition: sets the vin undervoltage fault threshold. data length in bytes: 2 data format: l11 type: r/w word default value: ca00h (4v) units: v range: 0 to 12v vin_uv_fault_response (5ah) definition: configures the vin undervoltage fault response. the delay time is the time between restart attempts. data length in bytes: 1 data format: bit type: r/w byte default value: 80h (disable and no retry) units: bit field name value description 7:6 response behavior: sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 continuous operation (ignore fault) 01 delay, disable and retry delay time is specified by bits [2:0] and retry attempt is specified in bits [5:3]. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 the pmbus device attempts to restart the nu mber of times set by these bits. the time between the start is set by the value in bits [2:0]. 111 attempts to restart continuously, without checking if the fault is still present, until it is disabled, bias power is removed, or another fault condition causes the unit to shut down. 2:0 retry and delay time 000-111 this time count is used for both the amount of time between retry attempts and for the amount of time a rail is to delay its response after a fault is detected. the retry time and delay time units are defined by the type of fault within each device.
zl9117m 34 fn7914.4 december 16, 2014 submit document feedback power_good_on (5eh) definition: sets the voltage threshold for power-good indication . power-good asserts when the output voltage exceeds power_good_on and de-asserts when the output voltage is less than vout_uv_fault_limit. data length in bytes: 2 data format: l16u type: r/w word default value: 0.9 x vout_command pin strap setting units: v ton_delay (60h) definition: sets the delay time from when the device is enabled to the start of vout rise. data length in bytes: 2 data format: l11 type: r/w word default value: ca80h (5ms) units: ms range: 0 to 500s ton_rise (61h) definition: sets the rise time of vout after enable and ton_delay. data length in bytes: 2 data format: l11 type: r/w word default value: d280h (10ms) units: ms range: 0 to 200ms toff_delay (64h) definition: sets the delay time from disable to start of vout fall. data length in bytes: 2 data format: l11 type: r/w word default value: ca80h (5ms) units: ms range: 0 to 500s toff_fall (65h) definition: sets the fall time for vout after disable and toff_delay. data length in bytes: 2 data format: l11 type: r/w word default value: d280h (10ms) units: ms range: 0 to 200ms status_byte (78h) definition: the status_byte command returns one byte of inform ation with a summary of the most critical faults. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a bit number status bit name meaning 7 busy a fault was declared because the device was busy and unable to respond. 6 off this bit is asserted if the unit is not providing power to the output, regardless of the reason, including simply not being enabled. 5 vout_ov_fault an output overvoltage fault has occurred. 4 iout_oc_fault an output overcurrent fault has occurred.
zl9117m 35 fn7914.4 december 16, 2014 submit document feedback status_word (79h) definition: the status_word command returns two bytes of information wi th a summary of the unit's fa ult condition. based on the information in these bytes, the host can get more information by reading the appropriate status registers. the low byte of the status_word is the same register as the status_byte (78h) command. data length in bytes: 2 data format: bit type: read only default value: 0000h units: n/a status_vout (7ah) definition: the status_vout command returns one data byte with the status of the output voltage. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a 3 vin_uv_fault an input undervoltage fault has occurred. 2 temperature a temperature fault or warning has occurred. 1 cml a communications, memory or logic fault has occurred. 0 none of the above a fault or warning not listed in bits 7:1 has occurred. bit number status bit name meaning bit number status bit name meaning 15 vout an output voltage fault or warning has occurred. 14 iout/pout an output current or output power fault or warning has occurred. 13 input an input voltage, input current, or input power fault or warning has occurred. 12 mfg_specific a manufacturer specific fault or warning has occurred. 11 power_good# the power_good signal , if present, is negated. (1) 10 fans a fan or airflow fault or warning has occurred. 9 other a bit in status_other is set. 8 unknown a fault type not given in bits 15:1 of the status_word has been detected. 7 busy a fault was declared because the device was busy and unable to respond. 6 off this bit is asserted if the unit is not providing power to the output, regardless of the reason, including simply not being enabled. 5 vout_ov_fault an output overvoltage fault has occurred. 4 iout_oc_fault an output overcurrent fault has occurred. 3 vin_uv_fault an input undervoltage fault has occurred. 2 temperature a temperature fault or warning has occurred. 1 cml a communications, memory or logic fault has occurred. 0 none of the above a fault or warning not listed in bits 7:1 has occurred. bit number status bit name meaning 7 vout_ov_fault indicates an output overvoltage fault. 6 vout_ov_warning indicates an output overvoltage warning. 5 vout_uv_warning indicates an output undervoltage warning. 4 vout_uv_fault indicates an output undervoltage fault. 3:0 n/a these bits are not used.
zl9117m 36 fn7914.4 december 16, 2014 submit document feedback status_iout (7bh) definition: the status_iout command returns one data byte with the status of the output current. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a status_input (7ch) definition: the status_input command returns input volt age and input current status information. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a status_temperature (7dh) definition: the status_temp command returns one byte of information with a summary of any temperature related faults or warnings. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a bit number status bit name meaning 7 iout_oc_fault an output overcurrent fault has occurred. 6 iout_oc_lv_fault an output overcurrent and low voltage fault has occurred. 5 iout_oc_warning (not used) reserved 4 iout_uc_fault an output undercurrent fault has occurred. 3:0 n/a these bits are not used. bit number status bit name meaning 7 vin_ov_fault an input overvoltage fault has occurred. 6 vin_ov_warning an input overvoltage warning has occurred. 5 vin_uv_warning an input undervoltage warning has occurred. 4 vin_uv_fault an input undervoltage fault has occurred. 3:0 n/a these bits are not used. bit number status bit name meaning 7 ot_fault an over-temperature fault has occurred. 6 ot_warning an over-temperature warning has occurred. 5 ut_warning an under-temperature warning has occurred. 4 ut_fault an under-temperature fault has occurred. 3:0 n/a these bits are not used.
zl9117m 37 fn7914.4 december 16, 2014 submit document feedback status_cml (7eh) definition: the status_word command returns one byte of informatio n with a summary of any co mmunications, logic and/or memory errors. data length in bytes: 1 data format: bit type : read only default value: 00h units: n/a status_mfr_specific (80h) definition: the status_mfr_specific command returns one byte of in formation providing the status of the device's voltage monitoring and clock synchronization faults. vdrv ov/uv warn ings are set at +/-10% of th e vmon_ov_fault/vmon_uv_fault commands. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a read_vin (88h) definition: returns the input voltage reading. data length in bytes: 2 data format: l11 type: read only units: v read_vout (8bh) definition: returns the output voltage reading. data length in bytes: 2 data format: l16u type: read only units: v bit number meaning 7 invalid or unsupported pmbus? command was received. 6 the pmbus? command was sent with invalid or unsupported data. 5 a packet error was detected in the pmbus? command. 4:2 not used 1 a pmbus? command tried to write to a read-only or protected command, or a communication fault other than the ones listed in this table has occurred. 0not used bit number field name meaning 7:6 reserved 5 vdrv uv warning the voltage on the vmon pin has dropped 10% below the level set by mfr_vmon_uv_fault_limit. 4 vdrv ov warning the voltage on the vmon pin has risen 10% above the level set by mfr_vmon_ov_fault_limit. 3 external switching period fault loss of ex ternal clock synchronization has occurred. 2 reserved 1 vdrv uv fault the voltage on the vmon pin has dropped below the level set by mfr_vmon_uv_fault_limit. 0 vdrv ov fault the voltage on the vmon pin has risen above the level set by mfr_vmon_ov_fault_limit.
zl9117m 38 fn7914.4 december 16, 2014 submit document feedback read_iout (8ch) definition: returns the output current reading. data length in bytes: 2 data format: l11 type: read only default value: n/a units: a read_temperature_1 (8dh) definition: returns the controller juncti on temperature reading from internal temperature sensor. data length in bytes: 2 data format: l11 type: read only units: c read_duty_cycle (94h) definition: reports the actual duty cycle of the converter during the enable state. data length in bytes: 2 data format: l11 type: read only units: % read_frequency (95h) definition: reports the actual switching frequency of the converter during the enable state. data length in bytes: 2 data format: l11 type: read only units: khz pmbus_revision (98h) definition: returns the revision of the pmbus implemented in the device. data length in bytes: 1 data format: hex type: read only units: n/a mfr_id (99h) definition: mfr_id sets user defined identification. the sum tota l of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial and user_data_00 plus one byte per command cannot exceed 128 characters. this limitation includes multiple writes of th is command before a store command. to clea r multiple writes, perform a restore, write this command then perform a store/restore. data length in bytes: user defined data format: asc type: block r/w default value: null units: n/a mfr_model (9ah) definition: mfr_model sets a user defined model. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial and user_data_00 plus one byte per command cannot exceed 128 characters. this limitation includes multiple writes of th is command before a store command. to clea r multiple writes, perform a restore, write this command then perform a store/restore. data length in bytes: user defined data format: asc type: block r/w default value: null units: n/a
zl9117m 39 fn7914.4 december 16, 2014 submit document feedback mfr_revision (9bh) definition: mfr_revision sets a user defined revision. the sum tota l of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial and user_data_00 plus one byte per command cannot exceed 128 characters. this limitation includes multiple writes of th is command before a store command. to clea r multiple writes, perform a restore, write this command then perform a store/restore. data length in bytes: user defined data format: asc type: block r/w default value: null units: n/a mfr_location (9ch) definition: mfr_location sets a user defined location identifier. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial and user_data_00 plus one byte per command cannot exceed 128 characters. this limitation includes multiple writes of th is command before a store command. to clea r multiple writes, perform a restore, write this command then perform a store/restore. data length in bytes: user defined data format: asc type: block r/w default value: null units: n/a mfr_date (9dh) definition: mfr_date sets a user defined date. the sum total of char acters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial and user_data_00 plus one byte per comm and cannot exceed 128 characters . this limitation includes multiple writes of this command before a store command. to clea r multiple writes, perform a restore, write this command then perform a store/restore. data length in bytes: user defined data format: asc type: block r/w default value: null units: n/a mfr_serial (9eh) definition: mfr_serial sets a user defined serializ ed identifier. the sum total of characte rs in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial and user_data_00 plus one byte per command cannot exceed 128 characters. this limitation includes multiple writes of th is command before a store command. to clea r multiple writes, perform a restore, write this command then perform a store/restore. data length in bytes: user defined data format: asc type: block r/w default value: null units: n/a user_data_00 (b0h) definition: user_data_00 sets a user defined da ta. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial and user_data_00 plus one byte per command cannot exceed 128 characters. this limitation includes multiple writes of th is command before a store command. to clea r multiple writes, perform a restore, write this command then perform a store/restore. data length in bytes: user defined data format: ascii type: block r/w default value: null units: n/a
zl9117m 40 fn7914.4 december 16, 2014 submit document feedback auto_comp_config (bch) definition: controls configuration of auto compensation features. data length in bytes: 1 data format: cus type: r/w byte default value: 69h (auto comp once, do not store results, pg assertion after auto comp, and gain = 70%) units: n/a auto_comp_control (bdh) definition: causes the auto comp algorithm to initiate when th e auto comp feature is enabled in auto_comp_config. data length in bytes: 0 data format: bit type: send byte default value: units: n/a deadtime_max (bfh) definition: sets the maximum dead time value for the pwmh and pwml outputs. this limit applies during frozen or adaptive dead time algorithm modes (see deadtime_config). data length in bytes: 2 data format: cus type: r/w word default value: 3838h (56ns/56ns) units: ns range : 0 to 60ns bits purpose value description 7:4 auto comp gain percentage g scale the gain of the auto-compensation results by a factor of (g+1)*10%, where 0 g 9. g = 0 yields lowest jitter; g = 9 yields tightest transient response. 3power good assertion 0use pg_delay 1 assert pg after auto comp completes 2auto comp store 0 do not store auto comp results 1 store auto comp results for use on future ramps 1:0 auto comp mode 0 off (disabled). compensation stored in pid_taps will be used. 1 once (results are storable) 2 repeat every ~1 second (only the first results are storable) 3 repeat every ~1 minute (only the first results are storable) bits purpose value description 15 not used 0 not used 14:8 sets the maximum h-to-l dead time h limits the maximum allowed h-to-l dead time when using the adaptive dead time algorithm. dead time = hns (signed) 7 not used 0 not used 6:0 sets the maximum l-to-h dead time l limits the maximum allowed l-to-h dead time when using the adaptive dead time algorithm. dead time = lns (signed)
zl9117m 41 fn7914.4 december 16, 2014 submit document feedback mfr_config (d0h) definition: configures several manufacturer-level features. data length in bytes: 2 data format: bit type: r/w word default value: 6a11h (416ns, 5 count, down slope, nlr wa it for pg, pg open drain, sync push-pull) units: n/a user_config (d1h) definition: configures several user-level features. data length in bytes: 2 data format: bit type: r/w word default value: 2011h (min duty enabled = 1* tsw/256, pid feed forward correct for vdd, ignore fault spread, clock sync pin strap mode, use internal clock, lowside mosfet off when disabled, monitor mode enabled) units: n/a bits purpose value description 15:11 current sense blanking delay d sets the delay, d, in 32ns steps 10:8 current sense fault count c sets the number of consecut ive oc or uc violations required for a fault to 2c+1. 7:6 reserved 5:4 current sense control 00 current sense uses gnd-re ferenced, down-slope sense 01 current sense uses vout-ref erenced, down-slope sensing 10 current sense uses vout-referenced, up-slope sensing 11 reserved 3nlr during ramp 0wait for pg 1always on 2alternate ramp control 0 alternate ramp disabled 1alternate ramp enabled 1 pg pin output control 0 pg is open-drain 1 pg is push-pull 0 sync pin output control 0 sync is open-drain 1sync is push-pull bits purpose value description 15:14 minimum duty cycle n sets the minimum duty cycle ((n+1)/(2^8)) during a ramp when ?minimum duty cycle? (bit 13) is enabled. for example, if minimum duty cycle input n is set to 3, the minimum duty cycle is (3+1)/(2 8 ) = (1/64). 13 minimum duty cycle control 0 minimum duty cycle is disabled 1 minimum duty cycle is enabled 12 reserved 0 11 sync time-out enable 0 sync output remains on after device is disabled 1 sync turns off 500ms after device is disabled 10 reserved - reserved 9 pid feed-forward control 0 pid coeffici ents are corrected for vdd variation 1 pid coefficients are not corrected for vdd variations
zl9117m 42 fn7914.4 december 16, 2014 submit document feedback ishare_config (d2h) definition: configures the device for current sh aring communication over the ddc bus. data length in bytes: 2 data format: bit type: r/w word default value: 0000h (device configured to operate in signal phase mode) units: ddc_config (d3h) definition: configures the ddc bus. data length in bytes: 2 data format: bit type: r/w word default value: 5 bit lsb of smbus address units: 8 fault spreading mode 0 if sequencing is disabled, this device will igno re faults from other devices. if sequencing is enabled, the devices will sequence down from the failed device outward. 1 faults received from any device selected by the ddc_group command will cause this device to shut down immediately. 7 smbus transmit clk rate 0 * smbus transm it is always disabled in ddc devices 6 sync utilization control 0 auto-configure using the sync pin and frequency_switch parameter 1 switch using the sync input 5 sync output control 0 configure the sync pin as an input-only 1 drive the switch clock out of sync when using the internal oscillator 4 smbus transmit inhibit 0 * smbus transmit is always disabled in ddc devices 3 smbus timeout inhibit 0 * smbus transmit is always disabled in ddc devices 2off low-side control 0 the low-side drive is off when device is disabled 1 the low-side drive is on when device is disabled 1:0 standby mode 00 enter low-power mode when device is disabled (no read_xxxx data available) 01 monitor for faults when device is disabled (read_xxxx data available) 10 reserved 11 monitor for faults using pulsed mode. (r ead_xxxx data available upon read command) bits purpose value description bits purpose value description 15:8 ishare ddc id 0 to 31 (0x00 to 0x1f) sets the current share rail?s ddc id for each device within a current share rail. set to the same ddc id as in ddc_config. this ddc id is used for sequencing and faul t spreading when used in a current share rail. 7:5 number of members 0 to 7 number of devices in current share rail -1. example: 3 device current share rail, use 3 ? 1 = 2 4:2 member position 0 to 7 position of device within current share rail 1 reserved 0 reserved 0 i-share control 1 device is a member of a current share rail 0 device is not a member of a current share rail
zl9117m 43 fn7914.4 december 16, 2014 submit document feedback power_good_delay (d4h) definition: sets the delay applied between the output exceeding the pg threshold (power_good_on) an d asserting the pg pin. the delay time can range from 0ms up to 500s, in steps of 125ns. a 1ms minimum configured value is recommended to apply proper de- bounce to this signal. data length in bytes: 2 data format: l11 type: r/w word default value: ba00h (1ms) units: ms range: 0 to 5s pid_taps (d5h) definition: configures the control lop compensator coefficients. the pid algorithm implements the follow ing z-domain function in equation 8: the coefficients a, b, and c are represented using a pseudo-floating point format similar to the v out parameters (with the addition of a sign bit), defined as equation 9: where m is a two-byte unsigned mantissa, s is a sign-bit, and e is a 7-bit two?s-complement signed integer. the 9-byte data fie ld is defined in the table below. s is stored as the msb of the e byte data length in bytes: 9 data format: cus type: r/w default value: auto comp stores when algorithm is initiated during start up. when auto comp is disabled pid_taps can be stored via pmbus. units: bits purpose value description 15:13 reserved 0 reserved 12:8 broadcast group 0 to 31 group number used for broadcast events. (i.e., broadcast enable and broadcast margin) set this number to the same value for all rails/devices that should respond to each other?s broadcasted event. this function is enabled by the bits 15 and 14 in the misc_config command. 7:6 reserved 0 reserved 5ddc tx inhibit 1ddc transmission inhibited 0 ddc transmission enabled 4:0 ddc id 0 to 31 sets the rail?s ddc id for sequencing an d fault spreading. for the current-sharing applications, set this value the same as the id value in ishare_config for all devices in the current sharing rail. byte purpose definition 8 tap c - e coefficient c exponent + s 7 tap c - m [15:8] coefficient c mantissa, high-byte 6 tap c - m [7:0] coefficient c mantissa, low-byte 5 tap b - e coefficient b exponent + s 4 tap b - m [15:8] coefficient b mantissa, high-byte 3 tap b - m [7:0] coefficient b mantissa, low-byte 2 tap a - e coefficient a exponent + s 1 tap a - m [15:8] coefficient a mantissa, high-byte 0 tap a - m [7:0] coefficient a mantissa, low-byte note: data bytes are transmitted on the pmbus in the order of byte 0 through byte 8. (eq. 8) abz 1 ? cz 2 ? ++ 1z 1 ? ? ------------------------------------------- - (eq. 9) a1 ? ?? s 2 e m ? ? =
zl9117m 44 fn7914.4 december 16, 2014 submit document feedback inductor (d6h) definition: informs the device of the circuit?s inductor value. this is used in adaptive algorithm calculat ions relating to the inductor ripple current. data length in bytes: 2 data format: l11. type : r/w word default value: b0e1h (0.22 h) units: h nlr_config(d7h) definition: configures the non-linear response control parameters. data length in bytes: 4 data format: bit type : r/w default value: 00000000h units: table 6. loading/unloading blanking times ovuv_config (d8h) definition: configures the output voltage ov and uv fault detect ion feature. the default value of 00h is recommended. data length in bytes: 1 data format: bit type: r/w byte default value: 00h (one violation trigger vout fault, ov fault does not enable low-side power device) units: n/a bits purpose value description 31:30 outer threshold multiplier o sets multiplier of in ner threshold for outer threshold setting, o*li and o*ui 29:27 nlr comparator threshold: loading-inner li sets i nner threshold for a loading event to ~0.5%*(li+1)*v out 26:24 nlr comparator threshold: unload ing-inner ui sets inner threshold for an unloading event to ~0.5%*(ui+1)*v out 23:20 loading-outer threshold max correction time lot sets outer threshold, maximum correction time for a loading event to lot*t sw /64 (s) 19:16 loading-inner threshold max correction time lit sets inner threshold, maximum corre ction time for a loading event to lit*t sw /64 (s) 15:12 unloading-outer threshold max correction time uot sets outer threshold, maximum correcti on time for an unloading event to uot*t sw /64 (s) 11:8 unloading-inner threshold max correction time uit sets inner threshold, maximum correct ion time for an unloading event to uit*t sw /64 (s) 7:4 load blanking time control lb sets nl r blanking time for a loading event. 3:0 unload blanking time control ub sets nlr blanking time for an unloading event. lb or ub 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 t sw /64 units 1 2 3 5 9 17 33 49 65 81 97 129 161 177 193 225 bits purpose value description 7 controls how an ov fault response shutdown sets the output driver state 0 an ov fault does not enable low-side power device 1 an ov fault enables the low-side power device 6:4 not used 0 not used 3:0 defines the number of consecutive limit violations required to declare an ov or uv fault n n+1 consecutive ov or uv violations initiate a fault response
zl9117m 45 fn7914.4 december 16, 2014 submit document feedback tempco_config (dch) definition: configures the correction factor and temperature measuremen t source when performing temperature coefficient correction for current sense. tempco_config values are applied as ne gative correction to a positive temperature coefficient. data length in bytes: 1 data format: cus type : r/w byte protectable: yes default value: 2ch (4400ppm/c) equation: to determine the hex value of the tempco correction factor (tc) for current scale of a power stage current sensing, first determine the temperature coefficient of resistance for the sensing element, . this is found with the following equation : where: r = sensing element resistance at temperature ?t? r ref = sensing element resistance at reference temperature t ref = temperature coefficient of resistance for the sensing element material t = temperature measured by temperature sensor, in c t ref = reference temperature that is specified at for the sensing element material after is determined, convert the value in units of 100ppm/c. this va lue is then converted to a hex value with the following equatio n : typical values: copper = 3900ppm/c (27h), silicon = 4800ppm/c (30h) range : 0 to 6300ppm/c deadtime (ddh) definition: sets the non-overlap between pwm transitions using a 2-byte data field. the most significant byte controls the high side to low side dead time value as a single 2?s-complement signed valu e in units of ns. the least-significant byte controls the low si de to high side dead time value. positive values imply a non-overlap of th e fet drive on-times. negative values imply an overlap of the fe t drive on-times. the device will operate at the dead time values writte n to this command when adaptive dead time is disabled, between the minimum dead time specified in deadtime_config and the maximu m dead time specified in dead time_max. when switching from adaptive dead time mode to frozen mode (by writing to bit 15 of deadtime_config) the frozen dead time will be whatever the last dead time was before the device switches to frozen dead time mode. data length in bytes: 2 data format: cus type: r/w word default value: 1018h (h-l = 16ns, l-h = 24ns) units: ns range: -15ns to 60ns deadtime_config (deh) definition: configures the adaptive dead time optimization mode. also se ts the minimum dead time valu e for the adaptive dead time mode range. data length in bytes: 2 data format: cus type: r/w word default value: 8686h (adaptive dead time disabled) units: n/a bits purpose value description 7 selects the temp sensor source for tempco co rrection 0 selects the internal temperature sensor 6:0 sets the tempco correction in units of 100ppm/ ? c for iout_cal_gain tc rsen (dcr) = iout_cal_gain x (1+tc x (t-25)) where rsen = resistance of sense element () ref ref ref rr rt t ? ? ? ? 6 10 100 tc ? ? ?
zl9117m 46 fn7914.4 december 16, 2014 submit document feedback sequence (e0h) definition: identifies the rail ddc id of the prequel and sequel rails wh en performing multi-rail sequencing. the device will enable its output when its en or operation enable state, as defined by on_off_config, is set and the preq uel device has issued a power-goo d event on the ddc bus. the device will disable its output (using the programmed delay values) when the sequel device has issued a power-down event on the ddc bus. the data field is a two-byte value. the most-significant byte co ntains the 5-bit rail ddc id of the prequel device. the least-s ignificant byte contains the 5-bit rail ddc id of the sequel device. the most significant bit of each byte contains the enable of the preq uel or sequel mode. this command overrides the corresponding sequence configuration set by the config pin settings. data length in bytes: 2 data format: bit type: r/w word default value: 0000h (prequel and sequel disabled) track_config (e1h) definition: configures the voltage tracking modes of the device. data length in bytes: 1 data format: bit type: r/w byte default value: 00h (tracking disabled) bits purpose value description 15 sets the high to low transition dead time mode 0 adaptive h-to-l dead time control 1 freeze the h-to-l dead time 14:8 sets the minimum h-to-l dead time 0-126d limits the minimum allowed h-to -l dead time when using the adaptive dead time algorithm (2ns resolution) 7 sets the low to high transition dead time mode 0 adaptive l-to-h dead time control 1 freeze the l-to-h dead time 6:0 sets the minimum l-to-h dead time 0-126d limits the minimum allowed l-to -h dead time when using the adaptive dead time algorithm (2ns resolution) bit field name value setting description 15 prequel enable 0 disable disable, no prequel preceding this rail. 1 enable enable, prequel to this rail is defined by bits 12:8. 14:13 reserved 0 reserved reserved. 12:8 prequel rail ddc id 0-31 ddc id set to the ddc id of the prequel rail. 7sequel enable 0 disable disable, no sequel following this rail. 1 enable enable, sequel to this rail is defined by bits 4:0. 6:5 reserved 0 reserved reserved. 4:0 sequel rail ddc id 0-31 ddc id set to the ddc id of the sequel rail. bit field name value setting description 7 voltage tracking control 0 disable tracking is disabled. 1 enable tracking is enabled. 6:3 reserved reserved reserved. 2tracking ratio control 0 100% output tracks at 100% ratio of vtrk input. 1 50% output tracks at 50% ratio of vtrk input. 1 tracking upper limit 0 target voltage output voltage is limited by target voltage. 1 vtrk voltage output voltage is limited by vtrk voltage. 0 ramp-up behavior 0 track after pg the output is not allowed to track vtrk down before power-good. 1 track always the output is allowed to track vtrk down before power-good.
zl9117m 47 fn7914.4 december 16, 2014 submit document feedback ddc_group (e2h) definition: this command sets which rail ddc ids a device should listen to for fault spreading information. a device can follow multiple ddc id rails. example is provided in following table. note: the device/rail?s own ddc id should not be set within the ddc_group command for that device/rail. all devices in a current share rail must shut down for the rail to report a shutdown. if fault spread mode is enabled in user_config (bit 8 set to 1) , the device will immediately shut down if one of its ddc_group members fail. the device/rail will attempt its configured restart only after all devices/rails within the ddc_group have cleare d their faults. if fault spread mode is disabled in user_config (bit 8 cleared to 0), the device will perform a sequenced shutdown as defined b y the sequence command setting. the rails/devices in a sequencing set on ly attempt their configured rest art after all faults have cle ared within the ddc_group. if fault spread mode is disabled and sequencing is also disabled, the device will ignore faults from othe r devices and stay enabled. data length in bytes : 4 data format: bit type: r/w default value: 00000000h (ignore fault spread) device_id (e4h) definition: returns the 16-byte (character) device identifier string. data length in bytes: 16 data format: asc type: block read default value: current firmware revision mfr_iout_oc_fault_response (e5h) definition: configures the iout overcurrent fault response as defined by the table below. sets the overcurrent status bit in status_iout. data length in bytes: 1 data format: bit type: r/w byte default value: 80h (disable, and no retry) units: ddc id configuration ddc_group description 0 3xzl9117m current sharing 0000000ah this ra il will listen to rail-1 and rail-3 1 2xzl9117m current sharing 00000004h th is rail will li sten to rail-2 2 1xzl9117m single phase 00000000h this rail will ignore fault spread 3 1xzl9117m single phase 00000002h this rail will listen to rail-1 bit field name value description 7:6 response behavior: sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 continuous operation (ignore fault) 01 delay, disable and retry delay time is specified by bits [2:0] and retry attempt is specified in bits [5:3]. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 the pmbus device attempts to restart the number of times set by these bits. the time between the start is set by the value in bits [2:0]. 111 attempts to restart continuously, without checking if the fault is still present, until it is disabled, bias power is removed, or another fault condition causes the unit to shut down. 2:0 retry and delay time 000-111 this time count is used for both the amount of time between retry attempts and for the amount of time a rail is to delay its response after a fault is detected. the retry time and delay time units are defined by the type of fault within each device.
zl9117m 48 fn7914.4 december 16, 2014 submit document feedback mfr_iout_uc_fault_ response (e6h) definition: configures the iout undercurrent fault response as defined by the table below. sets the undercurrent status bit in status_iout. data length in bytes: 1 data format: bit type: r/w byte default value: 80h (disable and no retry) units: iout_avg_oc_fault_limit (e7h) definition: sets the iout average overcurrent fault threshold. for down-slope sensing, this corresponds to the average of all the current samples taken during the (1-d) time interval, excluding the curren t sense blanking time (which o ccurs at the beginning of the 1 -d interval). for up-slope sensing, this corresponds to the averag e of all the current samples take n during the d time interval, e xcluding the current sense blanking time (which occurs at the beginning of the d interval). this feature shares the oc fault bit operation ( in status_iout) and oc fault response with iout_ oc_fault_limit. data length in bytes: 2 data format: l11 type: r/w word default value: db20h (25a) units: a range : -100 to 100a ii iout_avg_uc_fault_limit (e8h) definition: sets the iout average undercurrent faul t threshold. for down-slope sensing, this corresponds to the average of all the current samples taken during the (1-d) time interval, excluding the current sense blanki ng time (which occurs at the beginning of the 1-d interval). for up-slope sensing, this corresponds to the average of all the current samples taken during the d time interva l, excluding the current sense blanking time (w hich occurs at the beginning of the d inte rval). this feature shares the uc fault b it operation (in status_iout) and uc faul t response with iout_ uc_fault_limit. data length in bytes: 2 data format: l11 type: r/w word default value: dce0h (-25a) units: a range : -100 to 100a bit field name value description 7:6 response behavior: sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 continuous operation (ignore fault) 01 delay, disable and retry delay time is specified by bits [2:0] and retry attempt is specified in bits [5:3]. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 the pmbus device attempts to restart the number of times set by these bits. the time between the start is set by the value in bits [2:0]. 111 attempts to restart continuously, without checking if the fault is still present, until it is disabled, bias power is removed, or another fault condition causes the unit to shut down. 2:0 retry and delay time 000-111 this time count is used for both the amount of time between retry attempts and for the amount of time a rail is to delay its response after a fault is detected. the retry time and delay time units are defined by the type of fault within each device.
zl9117m 49 fn7914.4 december 16, 2014 submit document feedback misc_config (e9h) definition: sets options pertaining to advanced features. data length in bytes: 2 data format: bit type: r/w word default value: 0800h units: snapshot (eah) definition: the snapshot command is a 32-byte read-back of parametric and status values. it allows monitoring and status data to be stored to flash either during a fault condit ion or via a system-defined time using the snapshot_control command. in case of a f ault, last updated values are stored to the flash memory. use snapshot_control command to read stored values. data length in bytes: 32 data format: bit type: block read bits purpose value description 15 broadcast margin (see ddc_config) 0 disabled 1enabled 14 broadcast enable (see ddc_config) 0 disabled 1enabled 13:12 reserved 00 reserved 11:10 i-sense gain factor 00 dcr = 25mv 01 dcr = 35mv 10 dcr = 50mv 11 reserved 9:7 reserved 000 reserved 6 diode emulation 0 disabled 1 enabled, enter diode emulation at light loads to improve efficiency 5:2 reserved 0000 reserved 1snapshot 0 disabled 1enabled 0 reserved 0 reserved byte number value pmbus command format 31:22 reserved reserved 00h 21 manufacturer specific status byte status_mfr_specific (80h) byte 20 cml status byte status_cml (7eh) byte 19 temperature status byte status_temperature (7dh) byte 18 input status byte status_input (7ch) byte 17 iout status byte status_iout (7bh) byte 16 vout status byte status_vout (7ah) byte 15:14 switching frequency read_frequency (95h) l11 13:12 external temperature read_temperature_2 (8eh) l11 11:10 internal temperature read_temperature_1 (8dh) l11 9:8 duty cycle read_duty_cycle (94h) l11 7:6 peak current n/a l11
zl9117m 50 fn7914.4 december 16, 2014 submit document feedback blank_params (ebh) definition: returns a 16-byte string which indicates which parameter valu es were either retrieved by the last restore operation or have been written since that time. read ing blank_params immediately after a restore operation allows the user to determine wh ich parameters are stored in that store. index to read blank_pa ram is provided in ?pmbus command summary? on page 20. a one indicates the parameter is not present in the store and has not been written since the restore operation. data length in bytes: 16 data format: bit type: default value: ff...ffh phase_control (f0h) definition: this command controls phase adding/dropping when the device is setup for current sharing. data length in bytes: 1 data format: bit type: r/w byte snapshot_control (f3h) definition: writing a 01 will cause the device to copy the current snapshot values from nvram to the 32-byte snapshot parameters. writing a 02 will cause the device to write the current snapshot values to nvram. read from nvram (writing a 01) does not work if snapshot is enabled in misc_config. to read from nvram, the device has to be disabled. data length in bytes: 1 data format: bit type: r/w byte restore_factory (f4h) definition: restores the device to the hard-coded factory default values and pin strap definitions. the device retains the default and user stores for restoring. security level is changed to level 1 following this command. data length in bytes: 0 data format: n/a type: send byte default value: n/a units: n/a mfr_vmon_ov_faul t_limit (f5h) definition: reads the vdrv ov fault threshold. data length in bytes: 2 data format: l11 type: r/w word default value: cb80h (7v) units: v range: 0 to 19v 5:4 load current read_iout (8ch) l11 3:2 vout read_vout (8bh) l16u 1:0 vin read_vin (88h) l11 byte number value pmbus command format value description 00h the device phase is disabled or dropped 01h the device phase is active or added value description 01h move parametric and status values from flash to the ram 02h move latest parametric and status values from ram to the flash
zl9117m 51 fn7914.4 december 16, 2014 submit document feedback mfr_vmon_uv_fault_limit (f6h) definition: reads the vdrv uv fault threshold data length in bytes: 2 data format: l11 type : r/w word default value: ca40h (4.5v) units: v range: 0 to 19v mfr_read_vmon (f7h) definition: reads the vdrv voltage. data length in bytes: 2 data format: l11 type: read word default value: n/a units: v mfr_vmon_ov_fault_response (f8h) definition: configures the vdrv overvoltage fault response. data length in bytes : 1 data format: bit type: r/w byte default value: 80h (disable and no retry) units: n/a mfr_vmon_uv_fault_response (f9h) definition: configures the vdrv undervoltage fault response. data length in bytes: 1 data format: bit type: r/w byte default value: 80h (disable and no retry) units: n/a bit field name value description 7:6 response behavior: sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 continuous operation (ignore fault) 01 delay, disable and retry delay time is specified by bits [2:0] and retry attempt is specified in bits [5:3]. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 the pmbus device attempts to restart the number of times set by these bits. the time between the start is set by the value in bits [2:0]. 111 attempts to restart continuously, without checking if the fault is still present, until it is disabled, bias power is removed, or another fault condition causes the unit to shut down. 2:0 retry and delay time 000-111 this time count is used for both the amount of time between retry attempts and for the amount of time a rail is to delay its response after a fault is detected. the retry time and delay time units are defined by the type of fault within each device.
zl9117m 52 fn7914.4 december 16, 2014 submit document feedback security_level (fah) definition: the device provides write protection for individual commands. each bit in the unprotect parameter controls whether its corresponding command is writeable (commands are always readable). if a command is not writeable, a password must be entered in order to change its parameter (i.e., to enable writes to that command). there are two types of passwords, public and private. t he public password provides a simple lock-and-key protection against accide ntal changes to the device. it would typically be sent to the device in the application prior to making changes. private passwords allow commands marked as non-writeable in the unprotect parameter to be changed. private passwords are intended for protecting defaul t-installed configurations and wo uld not typically be used in t he application. each store (user and default) can have its own unpr otect string and private password. if a command is marked as non-writeable in the default unprotect parameter (its correspondi ng bit is cleared), the private password in the default store must be sent in order to change that command. if a command is writeable according to the default unprotect parameter, it may still b e marked as non-writeable in the user store unprotect parameter. in this case, the user private password can be sent to make the command writeable. the device supports four levels of security. each level is designed to be used by a particular class of users, ranging from mod ule manufacturers to end users, as discussed below. levels 0 and 1 correspond to the public password. all other levels require a pr ivate password. writing a private password can only raise the security level. writing a public password will reset the level down to 0 or 1. figure 21 shows the algorithm used by the device to dete rmine if a particular command write is allowed. bit field name value description 7:6 response behavior: sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 continuous operation (ignore fault) 01 delay, disable and retry delay time is specified by bits [2:0] and retry attempt is specified in bits [5:3]. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 the pmbus device attempts to restart the number of times set by these bits. the time between the start is set by the value in bits [2:0]. 111 attempts to restart continuously, without checking if the fault is still present, until it is disabled, bias power is removed, or another fault condition causes the unit to shut down. 2:0 retry and delay time 000-111 this time count is used for both the amount of time between retry attempts and for the amount of time a rail is to delay its response after a fault is detected. the retry time and delay time units are defined by the type of fault within each device.
zl9117m 53 fn7914.4 december 16, 2014 submit document feedback security level 3 ? module vendor level 3 is intended primarily for use by module vendors to protec t device configurations in the default store. clearing a unpro tect bit in the default store implies that a command is writeable only at level 3 and above. the device?s security level is raised to le vel 3 by writing the private password value previously stored in the defaul t store. to be effective, the module vendor must clear the un protect bit corresponding to the store_default_all and restore_default commands. otherwise, level 3 protection is ineffective since the entire store could be replaced by the user, including the enclosed private password. security level 2 ? user level 2 is intended for use by the end user of the device. clea ring a unprotect bit in the user store implies that a command is writeable only at level 2 and above. the device?s security leve l is raised to level 2 by writing the private password value pre viously stored in the user store. to be effective, the user must clear the unprotect bit corresponding to the store_user_all, restore_default_all, store_default_all, and restore_default co mmands. otherwise, level 2 protection is ineffective since the entire store could be replaced, including the enclosed private password. security level 1 ? public level 1 is intended to protect against accidental changes to ordi nary commands by providing a gl obal write-enable. it can be us ed to protect the device from erroneous bus operations. it provides ac cess to commands whose unprotect bit is set in both the default and user store. security is raised to level 1 by writing the publ ic password stored in the user store using the public_password command. the public password stored in the default store has no effect. always writeable ? security level == 3 ? default unprotect == 0 ? security level == 2 ? user unprotect == 0 ? security level == 1 ? n n n n write allowed write prohibited y y y y write attempted read only ? n n y y y n figure 21. algorithm used to dete rmine when a command is writeable
zl9117m 54 fn7914.4 december 16, 2014 submit document feedback security level 0 - unprotected level 0 implies that only commands which ar e always writeable (e.g., public_password) are available. this represents the lowest authority level and hence the most protected state of the device. the level can be reduced to 0 by using public_password to wri te any value which does not match the stored public password. data length in bytes: 1 data format: hex type: read byte default value: 01h private_password (fbh) definition: sets the private password string. data length in bytes: 9 data format: ascii. iso/iec 8859-1 type: block r/w default value: 000000000000000000h public_password (fch) definition : sets the public password string. data length in bytes: 4 data format: ascii. iso/iec 8859-1 type: block r/w default value: 00000000h unprotect (fdh) definition: sets a 256-bit (32-byte) parameter which identifies which co mmands are to be protected against write-access at lower security levels. each bit in this parameter corresponds to a co mmand according to the command?s code. the command with a code o f 00h (page) is protected by the least-significant bit of the leas t-significant byte, followed by the command with a code of 01h and so forth. note that all possible commands have a corresponding bit regardless of whether they are protectable or supported by the device. clearing a command?s unprotect bit indicates that write-access to that command is only allowed if the device?s security level h as been raised to an appropriate level. the unprotect bits in the default store require a security level 3 or greater to be writea ble. the unprotect bits in the user store require a security level of 2 or higher. data length in bytes: 32 data format: bit type: block r/w default value: ff?ffh
zl9117m 55 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn7914.4 december 16, 2014 for additional products, see www.intersil.com/en/products.html submit document feedback firmware revision history firmware revision code change description note fc04 not recommended for a new design. fc05 1. fixed bug: clear vmon_u v_warning when vmon (vdrv voltage is ramped up with a delay of >50ms from vin; 2. fixed bug: pid taps in default store does not work if pid taps are stored in user stor e on issuing restore default 3. fixed bug: added adc flash trim registers in the calibration table 4. max_duty = 91.375% 5. ovuv_config = 00h 6. frequency_switch = 571khz (sync pin open) 7. vout_ov_fault_limit = 1.15 x vout_command 8. vout_uv_fault_limit = 0.85 x vout_command 9. iout_oc_fault_limit = 37a 10. iout_uc_fault_limit = -37a 11. vin_ov_fault_limit = 14.5v 12. vin_ov_warn_limit = 13.2v 13. vin_uv_warn_limit = 4.375v 14. vin_uv_fault_limit = 4v 15. ton_rise = 10ms 16. ton_fall = 10ms 17. auto_comp_config = 69h 18. mfr_config = 6a11h 19. user_config = 2011h 20. inductor = 0.22h 21. tempco_config = 2ch 22. deadtime = 1018h (h to l = 16ns, l to h = 24ns) 23. deadtime_config = 8686h, freeze deadtimes 24. device_id = zl9117m-002-fc05 25. iout_avg_oc_fault_limit=25a 26. iout_avg_uc_fault_limit=-25a 27. misc_config = 0800h recommended for a new design.
zl9117m 56 fn7914.4 december 16, 2014 submit document feedback about intersil intersil corporation is a leading provider of innovative power ma nagement and precision analog so lutions. the company's product s address some of the largest markets within the industrial and infrastr ucture, mobile computing and high-end consumer markets. for the most updated datasheet, application notes, related documentatio n and related parts, please see the respective product information page found at www.intersil.com . you may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask . reliability reports are also av ailable from our website at www.intersil.com/support revision history the revision history provided is for informational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest revision. date revision change december 16, 2014 fn7914.4 removed all references to an2033 electrical spec table - driver supply current , ivdrv ty p from 25 to 30 and in conditions changed ?no load? to i out = 17a switching frequency range min from 500 to 400 added firmware revision history column to ordering information on page 4 and note referencing the history. made correction to part marking in ordering info rmation for ZL9117MAIRZ from zl9117ma to zl9117m. updated efficiency curves (figures 2 through 4)for various voltages with additional information on page 9. ?switching frequency and pll? on page 12 - added text and tables after 1st paragraph. updated equations in ?output capacitor selection? on page 18 added pmbus command summary and description beginning on page 20. updated pmbus command summary table updated ?snapshot parameter capture? on page 17. added lines 4 to 27 in fco5 change descriptio ns in ?firmware revision history? on page 55. may 10, 2013 fn7914.3 page 4: added ZL9117MAIRZ to ordering information table. page 6 - electrical spec table changed in input and supply characteristics section driver supply current, ivdrv - conditions, typ and unit from: not switching, 190, a to: vdrv = 6v, vout = 1.0v, fsw = 571khz, no load, 25, ma december 4, 2012 fn7914.2 changed cin an d cout values in figure 1 on page 1. removed notes from figure 1 on page 1. moved to pin description table (page 3) and typical application (page 6). line and load regulation on output characteristic (ele ctrical specifications) were combined to provide output voltage accuracy specification. added ?zl9117m internal block diagram? on page 5. added ?typical application - single module? on page 6. added ?output voltage selection? on page 11. added ?output voltage tracking? on page 15. added ?output capacitor selection? and ?input capacitor? on page 18. updated first bullet in ?monitoring via i2c/smbus? on page 17. updated figure 19 on page 18. october 12, 2011 fn7914.1 on page 1: changed ".. required for a complete dc/dc power solutio n." in first paragraph to ".. required for a highly integrated dc/dc power solution.? added "this power module has built-in auto-compensation algorithms, which eliminates the need for manual compensation design work." to first paragraph. changed "the zl9117m features internal compensatio n.." to "the zl9117m features auto-compensation.." added "auto compensating pid filter" to ?features?. august 30, 2011 fn7914.0 initial release
zl9117m 57 fn7914.4 december 16, 2014 submit document feedback package outline drawing l21.15x15 21 lead quad flat no-lead plastic package (punch qfn) rev 2, 8/11 bottom view side view top view 15.00.2 15.00.2 3.50.2 5 a l l a r o u n d s 16x 0.80 9x 1.900.05 8x 1.800.05 17x 0.75 6.25 2.95 1.95 7.25 33x 0.50 3.10 8.30 12.05 4.40 1.25 2.95 1.95 5.65 4.65 0.80 4.20 a b 1212019 18 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1 21 20 19 18 2 3 4 5 6 7 8 9 16 17 10 11 12 13 14 15 15.80.2 15.80.2 a b 1 21 20 19 18 2 3 4 5 6 7 8 9 16 17 10 11 12 13 14 15 a a a a a a b c c b a a a b a a a a a a a a a a b a a a a:1.30.1 b:2.60.1 c:1.130.1 a 0.05 s ab x4 0.2 s ab s 0.2 s 0.05 0.50 1 x 0.76
zl9117m 58 fn7914.4 december 16, 2014 submit document feedback stencil pattern with square pads-2 typical recommended land pattern stencil pattern with square pads-1 located within the zone indicated. the pin #1 indentifier may be unless otherwise specified, tolerance : decimal 0.2; the configuration of the pin #1 identifier is optional, but must be 3. either a mold or mark feature. 2. dimensions are in millimeters. 1. notes: body tolerance 0.2mm 0 0 0 6.10 5.50 4.90 4.20 3.60 2.90 2.30 1.60 1.00 0.30 0.30 1.00 1.60 2.30 2.90 4.90 5.50 6.10 6.20 5.40 4.80 4.105 3.545 2.85 2.25 0.75 1.35 2.35 2.80 3.50 6.70 8.20 4.10 6.10 8.20 5.50 5.05 4.05 2.90 3.60 4.05 5.05 5.50 6.82 8.20 6.90 6.30 5.60 5.00 4.30 3.70 3.00 2.40 0.55 0.05 0.90 1.50 6.78 8.20 2.20 2.80 3.50 4.10 0 2.30 1.60 1.15 0.15 0.30 1.00 1.60 2.30 2.90 3.60 6.82 0.55 1 2 0 0 0 1.25 1.85 3.85 4.45 5.80 0.75 2.55 2.45 3.05 4.215 5.80 6.475 4.815 4.55 5.25 3.85 0.95 3.42 4.02 6.48 0 0.05 1.65 2.25 6.375 6.33 5.25 6.37 3.85 1.35 0.75 unit: mm tolerance: 0.01mm unit: mm tolerance: 0.01mm 1 2 0 0 0 0 6.00 5.60 4.80 4.30 3.50 3.00 2.20 1.70 0.90 0.40 0.40 0.90 1.70 2.20 3.00 4.80 5.60 6.00 6.10 5.50 4.70 4.205 3.445 2.95 2.15 0.65 0.15 0.65 1.45 2.25 6.90 8.30 4.85 5.65 8.30 5.60 4.95 4.150 0.25 1.05 4.15 4.95 5.60 6.90 8.30 7.00 6.20 5.70 4.90 4.40 3.60 3.10 2.30 0.65 0.15 0.65 4.20 6.90 8.30 8.30 1 2 unit: mm tolerance: 0.01mm stencil pattern with square pads-2

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